Architecture model and resource graph building algorithm for detailed FPGA architecture design

2014 ◽  
Vol 31 (6) ◽  
pp. 505-512
Author(s):  
Zhihua Li ◽  
Haigang Yang ◽  
Liqun Yang ◽  
Wei Li ◽  
Juan Huang
Keyword(s):  
Architecture Design ◽  
Architecture Model ◽  
Fpga Architecture

A TRANSLATOR OF SOFTWARE ARCHITECTURE DESIGN FROM SAM TO JAVA

2007 ◽  
Vol 17 (06) ◽  
pp. 709-755 ◽  
Author(s):  
YUJIAN FU ◽  
ZHIJIANG DONG ◽  
XUDONG HE
Keyword(s):  
Petri Nets ◽  
Software Architecture ◽  
Temporal Logic ◽  
Subsequent Development ◽  
Experimental Result ◽  
Architecture Design ◽  
Architecture Model ◽  
Architecture Description ◽  
Java Code ◽  
Software Architecture Design

A software architecture design has many benefits including aiding comprehension, supporting early analysis, and providing guidance for subsequent development activities. An additional major benefit is if a partial prototype implementation can be automatically generated from a given software architecture design. However, in the past decade less progress was made on automatically realizing software architecture designs. In this paper, we present a translator for automatically generating an implementation from a software architectural description. The implementation not only captures the functionality of the given architecture description, but also contains additional monitoring code for ensuring desirable behavior properties through runtime verification. Our method takes a software description written in SAM, a software architecture model integrating dual formal methods Petri nets and temporal logic, and generates ArchJava/Java/AspectJ code. More specifically, the structure of a SAM architecture description produces ArchJava code, the behavior models of components/connectors represented in Petri nets lead to plain Java code, and the property specifications defined in temporal logic generate AspectJ code; the above code segments are then integrated into Java code. An experimental result is provided.

Application-specific low-power hybrid FPGA architecture design

2005 ◽  
Author(s):  
Ali Akoglu ◽  
Aravind Dasu ◽  
Sethuraman Panchanathan
Keyword(s):  
Low Power ◽  
Architecture Design ◽  
Fpga Architecture ◽  
Hybrid Fpga ◽  
Application Specific

Interlaced switch boxes placement for three-dimensional FPGA architecture design

2010 ◽  
Vol 40 (5) ◽  
pp. 489-502 ◽  
Author(s):  
Chun-Lung Hsu ◽  
Yu-Sheng Huang ◽  
Fong-Chao Lee
Keyword(s):  
Three Dimensional ◽  
Architecture Design ◽  
Fpga Architecture
Sign in / Sign up

Export Citation Format

Share Document