Design algorithms for asynchronous write operations in disk-buffer-cache memory

Journal of Systems and Software ◽

10.1016/0164-1212(91)90019-3 ◽

1991 ◽

Vol 16 (3) ◽

pp. 243-253 ◽

Author(s):

Anna Hać

Keyword(s):

Cache Memory ◽

Buffer Cache ◽

Design Algorithms

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Design algorithms for asynchronous operations in cache memory

ACM SIGMETRICS Performance Evaluation Review ◽

10.1145/1041911.1041914 ◽

1989 ◽

Vol 16 (2-4) ◽

pp. 21-21

Author(s):

Anna Hać

Keyword(s):

Cache Memory ◽

Design Algorithms

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Sensitivity study of asynchronous algorithms in disk buffer cache memory

Proceedings of the Twenty-Fifth Hawaii International Conference on System Sciences ◽

10.1109/hicss.1992.183149 ◽

1992 ◽

Author(s):

A. Hac

Keyword(s):

Sensitivity Study ◽

Cache Memory ◽

Asynchronous Algorithms ◽

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Performance and reliability improvement by using asynchronous algorithms in disk buffer cache memory

Acta Informatica ◽

10.1007/bf01178577 ◽

1993 ◽

Vol 30 (2) ◽

pp. 131-146 ◽

Author(s):

Anna Ha�

Keyword(s):

Cache Memory ◽

Reliability Improvement ◽

Asynchronous Algorithms ◽

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Improvement of Data Utilization Efficiency for Cache Memory by Compressing Frequent Bit Sequences

IEICE Transactions on Electronics ◽

10.1587/transele.e99.c.936 ◽

2016 ◽

Vol E99.C (8) ◽

pp. 936-946

Author(s):

Ryotaro KOBAYASHI ◽

Ikumi KANEKO ◽

Hajime SHIMADA

Keyword(s):

Utilization Efficiency ◽

Cache Memory ◽

Data Utilization

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Mobile Cache Memory Optimization using Noise Reduction

International Journal of Computer Sciences and Engineering ◽

10.26438/ijcse/v6i11.925931 ◽

2018 ◽

Vol 6 (11) ◽

pp. 925-931

Author(s):

P. Amudha Bhomini ◽

Jayasudha J.S

Keyword(s):

Noise Reduction ◽

Cache Memory ◽

Memory Optimization ◽

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Physical design algorithms for asynchronous circuits

10.31274/etd-180810-5467 ◽

2016 ◽

Author(s):

Gang Wu

Keyword(s):

Asynchronous Circuits ◽

Physical Design ◽

Design Algorithms

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Aspects of Cache Memory and Instruction Buffer Performance

10.21236/ada604007 ◽

1987 ◽

Author(s):

Mark D. Hill

Keyword(s):

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Jointly Optimal Fair Data Collection and Trajectory Design Algorithms in UAV-Aided Cellular Networks

2021 IEEE Wireless Communications and Networking Conference (WCNC) ◽

10.1109/wcnc49053.2021.9417581 ◽

2021 ◽

Author(s):

Dan Song ◽

Xiangping Bryce Zhai ◽

Xin Liu ◽

Chee Wei Tan

Keyword(s):

Data Collection ◽

Cellular Networks ◽

Trajectory Design ◽

Design Algorithms

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Code integrity verification using cache memory monitoring

Information Security Journal A Global Perspective ◽

10.1080/19393555.2021.1902592 ◽

2021 ◽

pp. 1-11

Author(s):

Rajesh Kumar Shrivastava ◽

Varun Natu ◽

Chittaranjan Hota

Keyword(s):

Cache Memory ◽

Integrity Verification ◽

Code Integrity ◽

Memory Monitoring

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Leakage energy reduction in cache memory by data compression

ACM SIGARCH Computer Architecture News ◽

10.1145/1360464.1360472 ◽

2007 ◽

Vol 35 (5) ◽

pp. 17-24 ◽

Author(s):

Kiyofumi Tanaka ◽

Takahiro Kawahara

Keyword(s):

Data Compression ◽

Energy Reduction ◽

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