Reconfigurable data parallel constant geometry fast Fourier transform architectures on Network-on-Chip

2015 ◽  
Vol 39 (8) ◽  
pp. 741-751 ◽  
Author(s):  
N. Prasad ◽  
Santanu Chattopadhyay ◽  
Indrajit Chakrabarti
Keyword(s):  
Fourier Transform ◽  
Fast Fourier Transform ◽  
Network On Chip ◽  
Data Parallel ◽  
On Chip

A study of 3D Network-on-Chip design for data parallel H.264 coding

2009 NORCHIP ◽  
2009 ◽  
Author(s):  
Thomas Canhao Xu ◽  
Alexander Wei Yin ◽  
Pasi Liljeberg ◽  
Hannu Tenhunen
Keyword(s):  
Network On Chip ◽  
Chip Design ◽  
Data Parallel ◽  
3D Network ◽  
On Chip

scholarly journals An Optimized Network-on-Chip Design for Data Parallel FFT1

2012 ◽  
Vol 30 ◽  
pp. 311-318 ◽  
Author(s):  
Thomas Canhao Xu ◽  
Pasi Liljeberg ◽  
Hannu Tenhunen
Keyword(s):  
Network On Chip ◽  
Chip Design ◽  
Data Parallel ◽  
On Chip

A Generic MPI Implementation for a Data-Parallel Skeleton: Formal Derivation and Application to FFT

1998 ◽  
Vol 08 (04) ◽  
pp. 447-458 ◽  
Author(s):  
Sergei Gorlatch ◽  
Holger Bischof
Keyword(s):  
Fourier Transform ◽  
Parallel Algorithms ◽  
Fast Fourier Transform ◽  
Independent Family ◽  
Data Parallel ◽  
Formal Derivation ◽  
Special Cases ◽  
Target Program ◽  
Mpi Implementation

We derive a provably correct, architecture-independent family of parallel implementations for a class of data-parallel algorithms, called DH (distributable homomorphisms). The implementations are well-structured SPMD programs with group-wise personalized all-to-all exchange, directly realizable in MPI. As a case study, we systematically adjust the mathematical specification of the Fast Fourier Transform (FFT) to the DH format and, thereby, obtain a generic SPMD implementation for FFT. The target program includes FFT solutions used in practice – the binary-exchange and the 2D- and SD-transpose – as special cases.

A study of 3D Network-on-Chip design for data parallel H.264 coding

2011 ◽  
Vol 35 (7) ◽  
pp. 603-612 ◽  
Author(s):  
Thomas Canhao Xu ◽  
Alexander Wei Yin ◽  
Pasi Liljeberg ◽  
Hannu Tenhunen
Keyword(s):  
Network On Chip ◽  
Chip Design ◽  
Data Parallel ◽  
3D Network ◽  
On Chip

scholarly journals On-Chip Implementation of Pipeline Digit-Slicing Multiplier-Less Butterfly for Fast Fourier Transform Architecture

2010 ◽  
Vol 3 (4) ◽  
pp. 757-764 ◽  
Author(s):  
Yazan Samir Algnabi ◽  
Rozita Teymourzad ◽  
Masuri Othman ◽  
Md Shabiul Islam ◽  
Mok Vee Hong
Keyword(s):  
Fourier Transform ◽  
Fast Fourier Transform ◽  
On Chip
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