Фотопреобразователь лазерного излучения на основе GaInP с КПД 46.7% на длине волны 600 nm

GaInP-based laser power converters (LPC) structure grown by MOVPE and device chip design have been optimized for operation under high-power lasers of the green-red spectral range. Light IV curves records have shown the performance of the LPC up to 40-50 W/cm2 of incident power densities. The highest level data were obtained for 532 nm, 600 nm, and 633 nm power laser lines: 44.3%, 46.7%, and 40.6% under 13-16 W/cm2, respectively. LPC demonstrated an efficiency of more than 40% at elevated up to 40-50 W/cm2 of the incident laser power density.

Neuromorphic Memristive Chips: Design and Technology

Memristive neuromorphic chips exploit a prospective class of novel functional materials (memristors) to deploy a new architecture of spiking neural networks for developing basic blocks of brain-like systems. Memristor-based neuromorphic hardware solutions for multi-agent systems are considered as challenges in frontier areas of chip design for fast and energy-efficient computing. As functional materials, metal oxide thin films with resistive switching and memory effects (memristive structures) are recognized as a potential elemental base for new components of neuromorphic engineering, enabling a combination of both data storage and processing in a single unit. A key design issue in this case is a hardware defined functionality of neural networks. The gradient change of resistive properties of memristive elements and its non-volatile memory behavior ensure the possibility of spiking neural network organization with unsupervised learning through hardware implementation of basic synaptic mechanisms, such as Hebb's learning rules including spike — timing dependent plasticity, long-term potentiation and depression. This paper provides an overview of scientific researches carrying out at Saint Petersburg Electrotechnical University "LETI" since 2014 in the field of novel electronic components for neuromorphic hardware solutions of brain-like chip design. Among the most promising concepts developed by ETU "LETI" are: the design of metal-insulator-metal structures exhibiting multilevel resistive switching (gradient tuning of resistive properties and bipolar resistive switching are combined together in a sin¬gle memristive element) for further use as artificial synaptic devices in neuromorphic chips; computing schemes for spatio-temporal pattern recognition based on spiking neural network architecture implementation; breadboard models of analogue circuits of hardware implementation of neuromorphic blocks for brain-like system developing.

Microdroplet Actuation via Light Line Optoelectrowetting (LL-OEW)

Meanwhile, electrowetting-on-dielectric (EWOD) is a well-known phenomenon, even often exploited in active micro-optics to change the curvature of microdroplet lenses or in analytical chemistry with digital microfluidics (DMF, lab on a chip 2.0) to move/actuate microdroplets. Optoelectrowetting (OEW) can bring more flexibility to DMF because in OEW, the operating point of the lab chip is locally controlled by a beam of light, usually impinging onto the chip perpendicularly. As opposed to pure EWOD, for OEW, none of the electrodes has to be structured, which makes the chip design and production technology simpler; the path of any actuated droplet is determined by the movement of the light spot. However, for applications in analytical chemistry, it would be helpful if the space both below as well as that above the lab chip were not obstructed by any optical components and light sources. Here, we report on the possibility to actuate droplets by laser light beams, which traverse the setup parallel to the chip surface and inside the OEW layer sequence. Since microdroplets are grabbed by this surface-parallel, nondiverging, and nonexpanded light beam, we call this principle “light line OEW” (LL-OEW).

Towards an Ontology-driven Intellectual Properties reuse for Systems On Chip design

Intellectual Properties reuse has gained widespread acceptance in System-On-Chip design to manage the complexity and shorten the time-to-market. However the need for a standard representation that permits IPs classification, characterization, and integration is still a big challenge. To address this problem, we propose to develop an IPs reuse specific ontology that facilitates IPs reuse at many levels of abstraction and independently from any design language or tool. Our ontology is built using the Protégé-OWL tool