A low-power analogue baseband circuit for a low data-rate impulse radio ultra-wideband (IR-UWB) receiver is designed and implemented in a 0.18 μm CMOS technology, including a variable-gain amplifier (VGA), a received signal strength indicator (RSSI), and a limiting amplifier (LA). The VGA has gain range from -9 to 63 dB and bandwidth from 31 to 187 MHz. An input P1dB of -15.4 dBm is achieved at 0 dB gain. The RSSI has a dynamic range of approximately 70 dB. The RSSI linearity error is within ±1.2 dB for an input power from -77.5 dBm to -36.2 dBm. By adjusting the VGA gain and the LA threshold, the LA is able to detect an input pulse as low as 0.6 mV at a data rate of 15 mega-pulse per second (MP/s). The analogue baseband circuit draws current of 6.03 mA from a single voltage supply of 1.8 V. The test chip occupies an area of 970 μm × 750 μm, including two output buffers.
A Short Range, Low Data Rate, 7.2 GHz-7.7 GHz FM-UWB Receiver Front-End