low power cmos
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2022 ◽  
Vol 31 (3) ◽  
pp. 1611-1626
Author(s):  
G. Prathiba ◽  
M. Santhi
Keyword(s):  


Author(s):  
Mohammadreza Rasekhi ◽  
Emad Ebrahimi ◽  
Hamed Aminzadeh

In this paper, an ultra-low power CMOS voltage reference capable of operating at sub-1[Formula: see text]V input supply is proposed. Four transistors biased in weak inversion are used to generate the required complementary-to-absolute-temperature (CTAT) and proportional-to-absolute-temperature (PTAT) voltages of the proposed circuit. Self-biasing of nature of the proposed configuration in the form of operational amplifier (opamp)-free ensure nano-power operation and eliminate the need for lateral bipolar junction transistors (BJTs) and offset cancelation techniques. A prototype of the circuit is designed and simulated in a standard 0.18-[Formula: see text]m CMOS process. Post-layout simulation results show that the circuit generates a reference voltage of 494[Formula: see text]mV with temperature coefficient (TC) of 58.4[Formula: see text]ppm/∘C across [Formula: see text]C to 85∘C; while the consuming power is lowered to 3.48[Formula: see text]nW at the minimum supply of 0.8[Formula: see text]V. The line sensitivity is 0.7%/V for the supply voltages from 0.8[Formula: see text]V to 1.8[Formula: see text]V, whereas the power supply ripple rejection (PSRR) is [Formula: see text]49.06[Formula: see text]dB at 1[Formula: see text]Hz. Monte Carlo simulation results of the voltage reference show a mean value of 497.2[Formula: see text]mV with [Formula: see text]/[Formula: see text] of 1.7%, demonstrating the robustness of the generated reference voltage against the process variations and mismatch.



2021 ◽  
Author(s):  
Ashutosh Yadav ◽  
Anand Bulusu ◽  
Sudeb Dasgupta ◽  
Surinder Singh


2021 ◽  
pp. 79-95
Author(s):  
Tejender Singh ◽  
Suman Latha Tripathi
Keyword(s):  


Author(s):  
Marcel Jotschke ◽  
Gokulkumar Palanisamy ◽  
Wilmar Carvajal Ossa ◽  
Harsha Prabakaran ◽  
Jeongwook Koh ◽  
...  




Electronics ◽  
2021 ◽  
Vol 10 (17) ◽  
pp. 2097
Author(s):  
Vasiliki Gogolou ◽  
Konstantinos Kozalakis ◽  
Eftichios Koutroulis ◽  
Gregory Doumenis ◽  
Stylianos Siskos

This work presents an ultra-low-power CMOS supercapacitor storage unit suitable for a plethora of low-power autonomous applications. The proposed unit exploits the unregulated voltage output of harvesting circuits (i.e., DC-DC converters) and redirects the power to the storage elements and the working loads. Being able to adapt to the input energy conditions and the connected loads' supply demands offers extended survival to the system with the self-startup operation and voltage regulation. A low-complexity control unit is implemented which is composed of power switches, comparators and logic gates and is able to supervise two supercapacitors, a small and a larger one, as well as a backup battery. Two separate power outputs are offered for external load connection which can be controlled by a separate unit (e.g., microcontroller). Furthermore, user-controlled parameters such as charging and discharging supercapacitor voltage thresholds, provide increased versatility to the system. The storage unit was designed and fabricated in a 0.18 um standard CMOS process and operates with ultra-low current consumption of 432 nA at 2.3 V. The experimental results validate the proper operation of the overall structure.



2021 ◽  
Author(s):  
Victor O. Costa ◽  
Andre L. Aita ◽  
Adilson J. Cardoso ◽  
Cesar R. Rodrigues ◽  
Jefferson Luiz B. Marques
Keyword(s):  




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