scholarly journals Successful fault current interruption on DC circuit breaker

2016 ◽  
Vol 9 (2) ◽  
pp. 207-218 ◽  
Author(s):  
Yunhai Shan ◽  
Tee C. Lim ◽  
Barry W. Williams ◽  
Stephen J. Finney
2019 ◽  
Vol 11 (16) ◽  
pp. 4493 ◽  
Author(s):  
Fazel Mohammadi ◽  
Gholam-Abbas Nazri ◽  
Mehrdad Saif

One of the major challenges toward the reliable and safe operation of the Multi-Terminal HVDC (MT-HVDC) grids arises from the need for a very fast DC-side protection system to detect, identify, and interrupt the DC faults. Utilizing DC Circuit Breakers (CBs) to isolate the faulty line and using a converter topology to interrupt the DC fault current are the two practical ways to clear the DC fault without causing a large loss of power infeed. This paper presents a new topology of a fast proactive Hybrid DC Circuit Breaker (HDCCB) to isolate the DC faults in MT-HVDC grids in case of fault current interruption, along with lowering the conduction losses and lowering the interruption time. The proposed topology is based on the inverse current injection technique using a diode and a capacitor to enforce the fault current to zero. Also, in case of bidirectional fault current interruption, the diode and capacitor prevent changing their polarities after identifying the direction of fault current, and this can be used to reduce the interruption time accordingly. Different modes of operation of the proposed topology are presented in detail and tested in a simulation-based system. Compared to the conventional DC CB, the proposed topology has increased the breaking current capability, and reduced the interruption time, as well as lowering the on-state switching power losses. To check and verify the performance and efficiency of the proposed topology, a DC-link representing a DC-pole of an MT-HVDC system is simulated and analyzed in the PSCAD/EMTDC environment. The simulation results verify the robustness and effectiveness of the proposed HDCCB in improving the overall performance of MT-HVDC systems and increasing the reliability of the DC grids.


Author(s):  
Shimin Xue ◽  
Baibing Liu ◽  
Shouxiang Wang ◽  
Xiao Chen ◽  
Xiaoshuai Zhu ◽  
...  

2014 ◽  
Vol 556-562 ◽  
pp. 1959-1963
Author(s):  
Si Ming Wei ◽  
Yi Gong Zhang ◽  
Huan Liu ◽  
Zhi Qiang Dai ◽  
Xiao Du

It is great significance for development of MTDC (Multi-terminal HVDC) to build DC transmission and distribution grids. However, the relatively low impedance in DC grids makes the fault penetration much faster and deeper .Consequently, fast and reliable DC circuit breaker is needed to isolate faults. Breaking time and other parameters are important for a breaker to achieve its goals. This paper presents a DC circuit breaker with a current-limiting inductance and gets the rising and falling characteristics of fault current. Based on the characteristics, a design method of breaking time sequence will be given, as well as the calculation of current-limiting inductance and the selection principles of arresters. A 10kV DC distribution grid is modeled and simulated by PSCAD/EMTDC to verify that the method can meet the requirements of breaking fault current quickly and reliably.


Author(s):  
Weijie Wen ◽  
Yizhen Wang ◽  
Bin Li ◽  
Yulong Huang ◽  
Ruisheng Li ◽  
...  

2020 ◽  
Vol 14 (14) ◽  
pp. 2869-2878
Author(s):  
Bin Xiang ◽  
Nuo Cheng ◽  
Kun Yang ◽  
Zhiyuan Liu ◽  
Yingsan Geng ◽  
...  

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