Constant-Current and Constant-Voltage Output for Single-Switch WPT System with Composite Shielding Structure

With the development of wireless power transfer (WPT), the wireless charging has become a research hotspot. This paper proposes a novel single-switch hybrid compensation topology, which can change the compensation network to realize the constant-current (CC) and constant-voltage (CV) output. The zero voltage switching (ZVS) margin can be designed to increase the stability of the system. In addition, the magnetic coupler adopts a composite shielding structure composed of ferrite, nanocrystalline, and aluminium foil. The composite shielding structure has a better shielding effect on magnetic flux leakage, and its weight is lighter. The composite shielding structure is expected to be used in the wireless charging system of electric vehicles (EVs). Finally, an experimental prototype is built to verify the theoretical analysis, and the maximum efficiency can reach 91.4%.

Optimization of TSPWM for Common-Mode Voltage Reduction in Vehicular Electric Drive System

Common-mode voltage can be reduced effectively by optimized modulation methods without increasing additional costs. However, the existing methods cannot satisfy the requirements of the vehicular electric-drive application. This paper optimizes the tri-state voltage modulation method to reduce the common-mode voltage for vehicular electric drive system applications. Firstly, the discontinuous switching issue during sector transition is analyzed. Under the limit of two switching times in one period, multiple alignments combination is proposed to address that issue. Secondly, the zero-voltage time intervals in different modulation ranges are explored. This paper proposes an unsymmetric translation method to reconstruct the voltage vector, and then the minimum zero-voltage time interval is controlled to enough value for safe switching. Finally, the proposed methods have been validated through experiments on a vehicular electric drive system. The results show that the common-mode voltage can be reduced effectively in the whole range with the optimized tri-state voltage modulation method.

An Embedded Half-Bridge Γ-Z-Source Inverter with Reduced Voltage Stress on Capacitors

In this paper, an embedded half-bridge Z-source inverter based on gamma structure is proposed. In contrast with the classical half-bridge inverter, the proposed inverter can generate zero voltage levels in output. High voltage gain and low voltage stress on capacitors are the main advantages of the proposed converter. The value of the boost factor in the proposed structure is increased by changing both the shoot-through (ST) duty cycle and turns ratio of the transformer. The operating principle of the proposed converter in four operating modes is presented. We also calculate the critical inductance and compare the proposed converter with conventional topologies. In addition, power loss and THD analysis are presented. Finally, PSCAD/EMTDC software is used to verify the correct operation of the proposed inverter and the experimental results.

Optimized Modulation Method for Common-Mode Voltage Reduction in H7 Inverter

The three-phase H7 inverter topology installs an additional power semiconductor switch to the positive or negative node of the DC-link for reducing the common-mode voltage (CMV) by disconnecting the inverter from the DC source during the zero-voltage vectors. The conventional CMV reduction method for the three-phase H7 inverter uses modified discontinuous pulse width modulation (MDPWM) and generates a switching signal for the additional switch using logical operations. However, the conventional method is unable to eliminate the CMV for the entire dwell time of the zero-voltage vectors. It only has the effect of reducing the CMV in a limited area of the space vector where the V7 zero voltage vector is applied. Therefore, this paper proposes an optimized modulation method that can reduce the CMV during the entire dwell time of zero-voltage vectors. The proposed method moves the switching patterns by adding an offset voltage to guarantee that only one kind of zero-voltage vector, V7, is applied in the system. It then turns off the seventh switch only during the zero-voltage vector to disconnect the inverter from the DC source. As a result, the CMV and the leakage current are attenuated for the entire dwell time of the zero-voltage vector. Simulation and experimental results confirm the validity of the proposed method.