Technical Assessment of Hybrid HVDC Circuit Breaker Components under M-HVDC Faults

One of the technical challenges that needs to be addressed for the future of the multi-terminal high voltage direct current (M-HVDC) grid is DC fault isolation. In this regard, HVDC circuit breakers (DCCBs), particularly hybrid circuit breakers (H-DCCBs), are paramount. The H-DCCB, proposed by the ABB, has the potential to ensure a reliable and safer grid operation, mainly due to its millisecond-level current interruption capability and lower on-state losses as compared to electromechanical and solid-state based DCCBs. This paper aims to study and evaluate the operational parameters, e.g., electrical, and thermal stresses on the IGBT valves and energy absorbed by the surge arrestors within H-DCCB during different DC fault scenarios. A comprehensive set of modeling requirements matching with operational conditions are developed. A meshed four-terminal HVDC test bench consisting of twelve H-DCCBs is designed in PSCAD/EMTDC to study the impacts of the M-HVDC grid on the operational parameters of H-DCCB. Thus, the system under study is tested for different current interruption scenarios under a (i) low impedance fault current and (ii) high impedance fault current. Both grid-level and self-level protection strategies are implemented for each type of DC fault.

A fault detection technique based on line parameters in ring-configured DC microgrid

The integration of distributed generation (DG) units into a DC microgrid presents a research challenge in terms of a proper protection scheme. The network must be protected due to the sudden change in the amplitude and direction of the fault current. In addition, due to the absence of zero-crossing of the DC fault current, protecting the network from these potential faults is a challenging task. The DC fault can be diagnosed using an appropriate detection technique after monitoring the movement of current. In this paper, a least-square estimation (LSE) technique has been adopted, which has been proven to be able to detect the faulty line strongly, so that the fault is detected by estimated parameters. This fault detection technique has been evaluated on six-lines, with faults analyzed on each line. The six-bus DC microgrid is designed in PSS®SINCAL, and the proposed method is simulated in MATLAB. Two sets of simulations are designed to validate the reliability of the proposed method: (1) pole–ground (P–G) and (2) pole–pole (P–P) fault estimation of inductance and capacitance (C) in a separate line. Simulation results show that the proposed methodology can able to accurately detect (i.e., 95% accuracy) the faulty line in the DC microgrid with respect to designated ‘trip’ value. Thus, the proposed fault detection methodology can be utilized for protection of modern DC microgrids. An experimental PV-battery-load-based fault detection technique has been developed in the laboratory and tested under P–P fault conditions in order to validate the effectiveness of the proposed scheme.

DC Fault Current Analyzing, Limiting, and Clearing in DC Microgrid Clusters

A new DC fault current limiter (FCL)-based circuit breaker (CB) for DC microgrid (MG) clusters is proposed in this paper. The analytical expressions of the DC fault current of a bidirectional interlink DC/DC converter in the interconnection line of two nearby DC MGs are analyzed in detail. Meanwhile, a DC fault clearing solution (based on using a DC FCL in series with a DC circuit breaker) is proposed. This structure offers low complexity, cost, and power losses. To assess the performance of the proposed method, time-domain simulation studies are carried out on a test DC MG cluster in a MATLAB/Simulink environment. The results of the proposed analytical expressions are compared with simulation results. The obtained results verify the analytical expression of the fault current and prove the effectiveness of the proposed DC fault current limiting and clearing strategy.