Low-power scan testing and test data compression for system-on-a-chip

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.998630 ◽

2002 ◽

Vol 21 (5) ◽

pp. 597-604 ◽

Author(s):

A. Chandra ◽

K. Chakrabarty

Keyword(s):

Low Power ◽

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Scan Testing ◽

System On A Chip

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Combining low-power scan testing and test data compression for system-on-a-chip

Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232) ◽

10.1109/dac.2001.935497 ◽

2002 ◽

Author(s):

A. Chandra ◽

K. Chakrabarty

Keyword(s):

Low Power ◽

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Scan Testing ◽

System On A Chip

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Combining low-power scan testing and test data compression for system-on-a-chip

Proceedings of the 38th Design Automation Conference (IEEE Cat. No.01CH37232) ◽

10.1145/378239.378396 ◽

2001 ◽

Author(s):

Anshuman Chandra ◽

Krishnendu Chakrabarty

Keyword(s):

Low Power ◽

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Scan Testing ◽

System On A Chip

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Efficient Test Data Compression and Low Power Scan Testing in SoCs

ETRI Journal ◽

10.4218/etrij.03.0303.0017 ◽

2003 ◽

Vol 25 (5) ◽

pp. 321-327 ◽

Author(s):

Jun-Mo Jung ◽

Jong-Wha Chong

Keyword(s):

Low Power ◽

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Scan Testing ◽

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Low-Power Scan Testing for Test Data Compression Using a Routing-Driven Scan Architecture

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2009.2018775 ◽

2009 ◽

Vol 28 (7) ◽

pp. 1101-1105 ◽

Author(s):

Dong Xiang ◽

Dianwei Hu ◽

Qiang Xu ◽

A. Orailoglu

Keyword(s):

Low Power ◽

Data Compression ◽

Test Data ◽

Test Data Compression ◽

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Test data compression of system-on-a-chip (SoC) based on partial runs reversing

JOURNAL OF ELECTRONIC MEASUREMENT AND INSTRUMENT ◽

10.3724/sp.j.1187.2010.00023 ◽

2010 ◽

Vol 24 (1) ◽

pp. 23-28

Author(s):

Yiming Ouyang ◽

Baosheng Zou ◽

Huaguo Liang ◽

Xi’e Huang

Keyword(s):

Data Compression ◽

Test Data ◽

Test Data Compression ◽

System On A Chip

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Frequency-directed run-length (FDR) codes with application to system-on-a-chip test data compression

Proceedings 19th IEEE VLSI Test Symposium. VTS 2001 ◽

10.1109/vts.2001.923416 ◽

2002 ◽

Author(s):

A. Chandra ◽

K. Chakrabarty

Keyword(s):

Data Compression ◽

Test Data ◽

Test Data Compression ◽

System On A Chip

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System-on-a-chip test-data compression and decompression architectures based on Golomb codes

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.913754 ◽

2001 ◽

Vol 20 (3) ◽

pp. 355-368 ◽

Author(s):

A. Chandra ◽

K. Chakrabarty

Keyword(s):

Data Compression ◽

Test Data ◽

Test Data Compression ◽

System On A Chip ◽

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Test data compression for system-on-a-chip using extended frequency-directed run-length code

IET Computers & Digital Techniques ◽

10.1049/iet-cdt:20070028 ◽

2008 ◽

Vol 2 (3) ◽

pp. 155 ◽

Author(s):

A.H. El-Maleh

Keyword(s):

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Extended Frequency ◽

System On A Chip ◽

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A new test data compression method for system-on-a-chip

2010 3rd International Conference on Computer Science and Information Technology ◽

10.1109/iccsit.2010.5563909 ◽

2010 ◽

Author(s):

Bo Ye ◽

Min Luo

Keyword(s):

Data Compression ◽

Test Data ◽

Test Data Compression ◽

Compression Method ◽

System On A Chip

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A Low-Power Enhanced Bitmask-Dictionary Scheme for Test Data Compression

2014 IEEE Computer Society Annual Symposium on VLSI ◽

10.1109/isvlsi.2014.103 ◽

2014 ◽

Author(s):

Vahid Janfaza ◽

Payman Behnam ◽

Bahjat Forouzandeh ◽

Bijan Alizadeh

Keyword(s):

Low Power ◽

Data Compression ◽

Test Data ◽

Test Data Compression

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