Conditional Acknowledge Synchronisation in Asynchronous Interconnect Switch Design

Author(s):  
Khodor Fawaz ◽  
Tughrul Arslan ◽  
Iain Lindsay
Keyword(s):  
2008 ◽  
Vol 1 (1) ◽  
pp. 43-54
Author(s):  
Basra Sultana ◽  
Mamun-ur-Rashid Khandker

Vertically stacked optical banyan (VSOB) networks are attractive for serving as optical switching systems due to the desirable properties (such as the small depth and self-routing capability) of banyan network structures. Although banyan-type networks result in severe blocking and crosstalk, both these problems can be minimized by using sufficient number of banyan planes in the VSOB network structure. The number of banyan planes is minimum for rearrangeably nonblocking and maximum for strictly nonblocking structure. Both results are available for VSOB networks when there exist no internal link-failures. Since the issue of link-failure is unavoidable, we intend to find the minimum number of planes required to make a VSOB network nonblocking when some links are broken or failed in the structure. This paper presents the approximate number of planes required to make a VSOB networks rearrangeably nonblocking allowing link-failures. We also show an interesting behavior of the  blocking  probability of a faulty VSOB networks that the blocking probability may not  always  increase monotonously with  the  increase  of  link-failures; blocking probability  decreases  for  certain range of  link-failures, and then increases again. We believe that such fluctuating behavior of blocking probability with the increase of link failure probability deserves special attention in switch design.  Keywords: Banyan networks; Blocking probability; Switching networks; Vertical stacking; Link-failures. © 2009 JSR Publications. ISSN: 2070-0237(Print); 2070-0245 (Online). All rights reserved. DOI: 10.3329/jsr.v1i1.1070


2021 ◽  
Vol 486 ◽  
pp. 126788
Author(s):  
Jia Guan ◽  
Mohammad Al-Amri ◽  
Jingping Xu ◽  
Nandi Bao ◽  
Chengjie Zhu ◽  
...  

Author(s):  
Nathan Binkert ◽  
Al Davis ◽  
Norman P. Jouppi ◽  
Moray McLaren ◽  
Naveen Muralimanohar ◽  
...  
Keyword(s):  

Author(s):  
Ankan De ◽  
Adam Morgan ◽  
Subhashish Bhattacharya ◽  
Douglas C. Hopkins

In this paper an attempt has been made to demonstrate various package design considerations to accommodate series connection of high voltage Si-IGBT (6500V/25A die) and SiC-Diode (6500V/25A die). The effects of connecting the cathode of the series diode to the collector of the IGBT versus connecting the emitter of the IGBT to the anode of the series diode has been analyzed in regards to gate terminal operation and the parasitic line inductance of the structure. ANSYS Q3D/MAXWELL software have been used to analyze and extract parasitic inductance and capacitances in the package along with electromagnetic fields, electric potentials, and current density distributions throughout the package for variable parameters. SIMPLIS-SIMETRIX is used to simulate typical switch behavior for different parasitic parameters under hard switched conditions. Various simulation results have then been used to redesign and justify the optimized package structure for the final current switch design. The thermal behavior of such a package is also conducted in COMSOL in order to ensure that the thermal ratings of the power devices is not exceeded, and to understand where potentially harmful hotspots could arise and estimate the maximum attainable frequency of operation. The main motivation of this work is to enumerate detailed design considerations for packing a high voltage current switch package.


2013 ◽  
Vol 39 ◽  
pp. 265-277 ◽  
Author(s):  
Noor Azwan Shairi ◽  
Badrul Hisham Ahmad ◽  
Peng Wen Wong

Author(s):  
Chaojiang Li ◽  
Greg Freeman ◽  
Myra Boenke ◽  
Ned Cahoon ◽  
Umut Kodak ◽  
...  
Keyword(s):  

2019 ◽  
Vol 34 (1) ◽  
pp. 397-406 ◽  
Author(s):  
Philipp Ruffing ◽  
Nils Collath ◽  
Christina Brantl ◽  
Armin Schnettler

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