This paper provides a runtime stability analysis of the Daisy-Chain clock synchronization algorithm running over CASCA - a time-triggered extension of CAN bus. The main objective is to show with practical results how to achieve global time base of high precision and how this precision is affected by the modification of the TDMA transmission schedule. That contributes by providing some basic guidelines for the task of designing time-triggered, TDMA-based distributed systems for embedded control applications.
Synchronization of the clocks is one of the essential thing for many applications in distributed systems. Clock synchronization is very important because they improve the performance and reliability of distributed systems. The main purpose of clock synchronization algorithms is to provide the common time to essential parts of the distributed systems. In this paper the problem considered is synchronization of clock with bounded clock drift and proposing a two level synchronization algorithm which synchronizes the processors local clocks by combining both internal and external clock synchronization.
A runtime stability analysis of clock synchronization precision on a time-triggered bus prototype