scholarly journals Improvement of Physical Clock Synchronization Algorithm by Two-Level Synchronization

2013 ◽  
Vol 11 (6) ◽  
pp. 2648-2652
Author(s):  
M. Praveen Kumar Reddy ◽  
K. Ashwin Kumar ◽  
S. Rajesh Kumar ◽  
RA.K. Saravanaguru
Keyword(s):  
Distributed Systems ◽  
Clock Synchronization ◽  
Clock Drift ◽  
Common Time ◽  
Synchronization Algorithm ◽  
External Clock Synchronization ◽  
The Common ◽  
External Clock

Synchronization of the clocks is one of the essential thing for many applications in distributed systems. Clock synchronization is very important because they improve the performance and reliability of distributed systems. The main purpose of clock synchronization algorithms is to provide the common time to essential parts of the distributed systems. In this paper the problem considered is synchronization of clock with bounded clock drift and proposing a two level synchronization algorithm which synchronizes the processors local clocks by combining both internal and external clock synchronization.

scholarly journals A runtime stability analysis of clock synchronization precision on a time-triggered bus prototype

2009 ◽  
Vol 20 (1) ◽  
pp. 45-52
Author(s):  
Fabiano C. Carvalho ◽  
Carlos E. Pereira
Keyword(s):  
Stability Analysis ◽  
Distributed Systems ◽  
High Precision ◽  
Can Bus ◽  
Clock Synchronization ◽  
Time Base ◽  
Embedded Control ◽  
Control Applications ◽  
Synchronization Algorithm ◽  
Transmission Schedule

This paper provides a runtime stability analysis of the Daisy-Chain clock synchronization algorithm running over CASCA - a time-triggered extension of CAN bus. The main objective is to show with practical results how to achieve global time base of high precision and how this precision is affected by the modification of the TDMA transmission schedule. That contributes by providing some basic guidelines for the task of designing time-triggered, TDMA-based distributed systems for embedded control applications.

scholarly journals Power-Aware Synchronization of a Software Defined Clock

2019 ◽  
Vol 8 (1) ◽  
pp. 11 ◽  
Author(s):  
Augusto Ciuffoletti
Keyword(s):  
Formal Model ◽  
Optimal Algorithm ◽  
Clock Synchronization ◽  
Low Cost ◽  
Time Coordinate ◽  
Clock Drift ◽  
Common Time ◽  
System A ◽  
Hardware Clock ◽  
And Control

In a distributed system, a common time reference allows each component to associate the same timestamp to events that occur simultaneously. It is a design option with benefits and drawbacks since it simplifies and makes more efficient a number of functions, but requires additional resources and control to keep component clocks synchronized. In this paper, we quantify how much power is spent to implement such a function, which helps to solve the dilemma in a system of low-power sensors. To find widely applicable results, the formal model used in our investigation is agnostic of the communication pattern that components use to synchronize their clocks, and focuses on the scheduling of clock synchronization operations needed to correct clock drift. This model helps us to discover that the dynamic calibration of clock drift significantly reduces power consumption. We derive an optimal algorithm to keep a software defined clock (SDCk) synchronized with the reference, and we find that its effectiveness is strongly influenced by hardware clock quality. To demonstrate the soundness of formal statements, we introduce a proof of concept. For its implementation, we privilege low-cost components and standard protocols, and we use it to find that the power needed to keep a clock within 200 ms from UTC (Universal Time Coordinate) as on the order of 10−5 W . The prototype is fully documented and reproducible.

Temporal Imaging System with Simple External Clock Synchronization

2009 ◽  
Author(s):  
Daniel H. Broaddus ◽  
Mark A. Foster ◽  
Onur Kuzucu ◽  
Amy C. Turner-Foster ◽  
Michal Lipson ◽  
...  
Keyword(s):  
Imaging System ◽  
Clock Synchronization ◽  
External Clock Synchronization ◽  
External Clock
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