<p>As the functionality in real-time embedded systems becoming complex, there has been a demand for higher computation capability, exploitation of parallelism and effective usage of the resources. Further, technological limitations in uniprocessor in terms of power consumption, instruction level parallelism reaching saturation, delay in access of memory blocks; directed towards emergence of multicore. Multicore design has its challenges as well. Increase in number cores has raised the demand for proper load distribution, parallelizing existing sequential codes, enabling effective communication and synchronization between cores, memory and I/O devices. This paper brings out the demand for effective load distribution with analyzes and discussion about the various task allocation techniques and algorithms associated with decentralized task scheduling technique for multicore systems. This paper also addresses on the multithreaded architecture, where parallel tasks are formulated from sequential code blocks and finally on the techniques to parallelize the sequential code block.</p>
Power-sensitive multithreaded architecture
