Design-Space Exploration of Application-specific Instruction-set Processor Design

Application-Specific Instruction-Set Processors (ASIPs) have established their processing power in the embedded systems. Since energy efficiency is one of the most important challenges in this area, coarse-grained reconfigurable arrays (CGRAs) have been used in many different domains. The exclusive program execution model of the CGRAs is the key to their energy efficiency but it has some major costs. The context-switching network (CSN) is responsible for handling this unique program execution model and is also one of the most energy-hungry parts of the CGRAs. In this paper, we have proposed a new method to predict important architectural parameters of the CSN of a CGRA, such as the size of the processing elements (PEs), the topology of the CSN, and the number of configuration registers in each PE. The proposed method is based on the high-level code of the input application, and it is used to prune the design space and increase the energy efficiency of the CGRA. Based on our results, not only the size of the design space of the CSN of the CGRA is reduced to 10%, but also its performance and energy efficiency are increased by about 13% and 73%, respectively. The predicted architecture by the proposed method is over 97% closer to the best architecture of the exhaustive searching for the design space.

Autotuning Parallel Programs by Model Checking

The paper presents a new approach to autotuning data-parallel programs. Autotuning is a search for optimal program settings which maximize its performance. The novelty of the approach lies in the use of the model checking method to find the optimal tuning parameters by the method of counterexamples. In our work, we abstract from specific programs and specific processors by defining their representative abstract patterns. Our method of counterexamples implements the following four steps. At the first step, an execution model of an abstract program on an abstract processor is described in the language of a model checking tool. At the second step, in the language of the model checking tool, we formulate the optimality property that depends on the constructed model. At the third step, we find the optimal values of the tuning parameters by using a counterexample constructed during the verification of the optimality property. In the fourth step, we extract the information about the tuning parameters from the counter-example for the optimal parameters. We apply this approach to autotuning parallel programs written in OpenCL, a popular modern language that extends the C language for programming both standard multi-core processors (CPUs) and massively parallel graphics processing units (GPUs). As a verification tool, we use the SPIN verifier and its model representation language Promela, whose formal semantics is good for modelling the execution of parallel programs on processors with different architectures.

A Survey of IoT Stream Query Execution Latency Optimization within Edge and Cloud

IoT (Internet of Things) streaming data has increased dramatically over the recent years and continues to grow rapidly due to the exponential growth of connected IoT devices. For many IoT applications, fast stream query processing is crucial for correct operations. To achieve better query performance and quality, researchers and practitioners have developed various types of query execution models—purely cloud-based, geo-distributed, edge-based, and edge-cloud-based models. Each execution model presents unique challenges and limitations of query processing optimizations. In this work, we provide a comprehensive review and analysis of query execution models within the context of the query execution latency optimization. We also present a detailed overview of various query execution styles regarding different query execution models and highlight their contributions. Finally, the paper concludes by proposing promising future directions towards advancing the query executions in the edge and cloud environment.

Exploration of Psychological Mechanism of Smartphone Addiction Among International Students of China by Selecting the Framework of the I-PACE Model

The I-PACE (interaction of person-affect-cognition-execution) model explains that the causes of addiction are the result of individual susceptibility (genetic and personality), psychopathological factors (negative emotions), and cognitive and affective factor interaction. The issue of smartphone addiction and its emerging effects are now becoming an essential social enigma. This study is aimed at exploring how personal, affective, cognitive, and execution factors accelerate the mechanism of smartphone addiction among international students. Randomly selected, six hundred international students have constituted the population for our study. All participants were asked to complete self-administered questionnaires. The questionnaire included demographics (gender, place of stay, educational level, and reason for smartphone usage), Mobile Phone Addiction Index, Loneliness Scale (UCLA), Rosenberg Self-Esteem Scale, Beck Depression Inventory, Perceived Stress Scale, Eysenck Personality Questionnaire, and Simplified Coping Style Questionnaire. Statistical analysis was performed using SPSS. 20.3% (n = 122) of international students are agonized with smartphone addiction, while 79.7% (n = 478) use smartphones at an average level. Students’ place of stay, neuroticism personality, social desirability, self-esteem, loneliness, depression, perceived stress, and passive coping are associated with smartphone addiction. Loneliness and depression show a strong positive significant correlation, among other variables while loneliness, neurotic personality, depression, low self-esteem, stress, and passive coping are risk factors for smartphone addiction. This study reveals that international students are a high-risk group for smartphone addiction. It has a great deal of impact on students’ behavior and psyche. Multiple social, psychological, affective, and cognitive factors affect smartphone addiction. It would be beneficial to direct the students to limit their phone usage and indulge in other healthy physical activities to complete academic goals.

Modeling and Reasoning in Event Calculus using Goal-Directed Constraint Answer Set Programming

Automated commonsense reasoning (CR) is essential for building human-like AI systems featuring, for example, explainable AI. Event calculus (EC) is a family of formalisms that model CR with a sound, logical basis. Previous attempts to mechanize reasoning using EC faced difficulties in the treatment of the continuous change in dense domains (e.g. time and other physical quantities), constraints among variables, default negation, and the uniform application of different inference methods, among others. We propose the use of s(CASP), a query-driven, top-down execution model for Predicate Answer Set Programming with Constraints, to model and reason using EC. We show how EC scenarios can be naturally and directly encoded in s(CASP) and how it enables deductive and abductive reasoning tasks in domains featuring constraints involving both dense time and dense fluents.

Persistent software transactional memory in Haskell

Emerging persistent memory in commodity hardware allows byte-granular accesses to persistent state at memory speeds. However, to prevent inconsistent state in persistent memory due to unexpected system failures, different write-semantics are required compared to volatile memory. Transaction-based library solutions for persistent memory facilitate the atomic modification of persistent data in languages where memory is explicitly managed by the programmer, such as C/C++. For languages that provide extended capabilities like automatic memory management, a more native integration into the language is needed to maintain the high level of memory abstraction. It is shown in this paper how persistent software transactional memory (PSTM) can be tightly integrated into the runtime system of Haskell to atomically manage values of persistent transactional data types. PSTM has a clear interface and semantics extending that of software transactional memory (STM). Its integration with the language’s memory management retains features like garbage collection and allocation strategies, and is fully compatible with Haskell's lazy execution model. Our PSTM implementation demonstrates competitive performance with low level libraries and trivial portability of existing STM libraries to PSTM. The implementation allows further interesting use cases, such as persistent memoization and persistent Haskell expressions.

Foundations of Programmable Secure Computation

This paper formalises the security of programmable secure computation focusing on simplifying security proofs of new algorithms for existing computation frameworks. Security of the frameworks is usually well established but the security proofs of the algorithms are often more intuitive than rigorous. This work specifies a transformation from the usual hybrid execution model to an abstract model that is closer to the intuition. We establish various preconditions that are satisfied by natural secure computation frameworks and protocols, thus showing that mostly the intuitive proofs suffice. More elaborate protocols might still need additional proof details.

Accelerated First Oil With Integrated Execution Model, Digital FEED Platform And Product Standardization

This paper illustrates how a subsea integrated ("SURF – Subsea Umbilicals Risers Flowlines" and "SPS – Subsea Production systems") execution model can be significantly improved in further reducing the time to first oil. It illustrates the use of digital platforms for FEEDs (Front End Engineering and Design) and Configure to Order (CTO) product designs to provide further schedule improvements resulting in an enhanced execution model. The time to first oil is considerably improved by cruising through the Front-End design gates using digital FEED platforms. CTO designs enable a project to reach the manufacturing gate faster by reducing detailed engineering effort significantly and in some cases eliminating it. The paper provides an introduction to the conventional execution model (Split SURF and SPS scopes), the integrated execution model (combined SURF and SPS scopes) and the enhanced integrated execution model (using digital FEED platform and CTO products). A comparison has been made on project delivery schedules between the three models illustrating the schedule savings through use of digital FEED platforms and CTO designs. It concludes that digitalization of FEEDs and standardization of product configurations create value for the operators in context of faster return on investment. Digital FEEDs are a new concept and still in its infancy. CTO design is a known concept; however, in context of a subsea project, how it may improve schedule delivery is not well established. These factors are truly an enhancement to the integrated execution approach and the additional value gets delivered to the end customer by further accelerating the time to first oil.