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Design and implementation of parallel floating point matrix multiplier for quaternion computation
2015 International Conference on Control, Instrumentation, Communication and Computational Technologies (ICCICCT)
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10.1109/iccicct.2015.7475292
◽
2015
◽
Author(s):
Shivaprasad B K
◽
Kunjan D. Shinde
◽
Vishwanath Muddi
Keyword(s):
Floating Point
◽
Design And Implementation
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Design and implementation of a GaAs systolic floating-point processing element
IEE Proceedings - Computers and Digital Techniques
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10.1049/ip-cdt:19960635
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1996
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Vol 143
(5)
◽
pp. 325
Author(s):
A. Beaumont-Smith
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W. Marwood
◽
C.C. Lim
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K. Eshraghian
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Processing Element
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Floating Point
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Design And Implementation
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Design and Implementation of Floating Point Unit using 15 nm FIFET
Indian Journal of Science and Technology
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10.17485/ijst/2016/v9i37/102131
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2016
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Vol 9
(37)
◽
Author(s):
R. Dhanabal
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Sarat Kumar Sahoo
Keyword(s):
Floating Point
◽
Design And Implementation
◽
Floating Point Unit
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Design and Implementation and On-Chip High-Speed Test of SFQ Half-Precision Floating-Point Adders
IEEE Transactions on Applied Superconductivity
◽
10.1109/tasc.2009.2019070
◽
2009
◽
Vol 19
(3)
◽
pp. 634-639
◽
Cited By ~ 14
Author(s):
Heejoung Park
◽
Y. Yamanashi
◽
K. Taketomi
◽
N. Yoshikawa
◽
M. Tanaka
◽
...
Keyword(s):
High Speed
◽
Floating Point
◽
Speed Test
◽
Design And Implementation
◽
On Chip
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Design and Implementation of a Floating point matrix Inversion Module using Model based Programming
2019 IEEE 16th India Council International Conference (INDICON)
◽
10.1109/indicon47234.2019.9030370
◽
2019
◽
Author(s):
Chetan S.
◽
Lekshmi V.
◽
Sudhakar S.
◽
Manikandan J.
Keyword(s):
Matrix Inversion
◽
Floating Point
◽
Design And Implementation
◽
Model Based
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Design and Implementation of FPGA Based 32 Bit Floating Point Processor for DSP Application
2018 Fourth International Conference on Computing Communication Control and Automation (ICCUBEA)
◽
10.1109/iccubea.2018.8697775
◽
2018
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Cited By ~ 1
Author(s):
Anand Burud
◽
Pradip Bhaskar
Keyword(s):
Floating Point
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Design And Implementation
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Design and Implementation of Double Precision Floating Point Division and Square Root on FPGAs
2006 IEEE Aerospace Conference
◽
10.1109/aero.2006.1655961
◽
2006
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Cited By ~ 8
Author(s):
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◽
A. Ejnioui
Keyword(s):
Floating Point
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Double Precision
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Square Root
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Design And Implementation
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Design and implementation of single precision pipelined floating point co-processor
2013 International Conference on Advanced Electronic Systems (ICAES)
◽
10.1109/icaes.2013.6659365
◽
2013
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Cited By ~ 2
Author(s):
Manisha Sangwan
◽
A. Anita Angeline
Keyword(s):
Floating Point
◽
Single Precision
◽
Design And Implementation
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Design and implementation of a high-performance 64-bit floating-point reciprocal and square root reciprocal unit
2008 9th International Conference on Solid-State and Integrated-Circuit Technology
◽
10.1109/icsict.2008.4734918
◽
2008
◽
Cited By ~ 3
Author(s):
Chaochao Feng
◽
Shaoqing Li
◽
Minxuan Zhang
Keyword(s):
High Performance
◽
Floating Point
◽
Square Root
◽
Design And Implementation
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The Design and Implementation of Multi-Precision Floating Point Arithmetic Unit Based on FPGA
2018 International Conference on Intelligent Transportation, Big Data & Smart City (ICITBS)
◽
10.1109/icitbs.2018.00154
◽
2018
◽
Cited By ~ 1
Author(s):
Lei Kang
◽
Cailing Wang
Keyword(s):
Floating Point
◽
Arithmetic Unit
◽
Design And Implementation
◽
Floating Point Arithmetic
◽
Point Arithmetic
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Design and Implementation of low power Floating Point Multiplier
IOSR Journal of Engineering
◽
10.9790/3021-031114957
◽
2013
◽
Vol 3
(11)
◽
pp. 49-57
Author(s):
J. Koteswara Rao
Keyword(s):
Low Power
◽
Floating Point
◽
Design And Implementation
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