A new efficient layer assignment algorithm for partitioning in 3D VLSI physical design

2013 1st International Conference on Emerging Trends and Applications in Computer Science ◽

10.1109/icetacs.2013.6691423 ◽

2013 ◽

Author(s):

Ajoy Kumar Khan ◽

Sudipta Roy ◽

Bhaskar Das ◽

Rajat Kumar Pal

Keyword(s):

Physical Design ◽

Assignment Algorithm ◽

Vlsi Physical Design ◽

Layer Assignment

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Wire-routing machines—New tools for VLSI physical design

Proceedings of the IEEE ◽

10.1109/proc.1983.12527 ◽

1983 ◽

Vol 71 (1) ◽

pp. 57-65 ◽

Author(s):

Se June Hong ◽

R. Nair

Keyword(s):

Physical Design ◽

Wire Routing ◽

Vlsi Physical Design

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VLSI Physical Design Automation

Algorithms for VLSI Physical Design Automation ◽

10.1007/978-1-4757-2219-2_1 ◽

1993 ◽

pp. 1-27

Author(s):

Naveed A. Sherwani

Keyword(s):

Design Automation ◽

Physical Design ◽

Vlsi Physical Design

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Application of a Novel Evolutionary Neural Network for Macro-cell Placement Optimization in VLSI Physical Design

Lecture Notes in Computer Science - Intelligent Computing ◽

10.1007/11816157_77 ◽

2006 ◽

pp. 649-654 ◽

Author(s):

Wei Zhou ◽

Gaofeng Wang ◽

Xi Chen

Keyword(s):

Neural Network ◽

Physical Design ◽

Evolutionary Neural Network ◽

Placement Optimization ◽

Vlsi Physical Design ◽

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Multiscale Optimization in VLSI Physical Design Automation

Multiscale Optimization Methods and Applications - Nonconvex Optimization and Its Applications ◽

10.1007/0-387-29550-x_1 ◽

2006 ◽

pp. 1-67

Author(s):

Tony F. Chan ◽

Jason Cong ◽

Joseph R. Shinnerl ◽

Kenton Sze ◽

Min Xie ◽

...

Keyword(s):

Design Automation ◽

Physical Design ◽

Multiscale Optimization ◽

Vlsi Physical Design

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Wirelength Based Clustering Technique for VLSI Physical Design

2007 Canadian Conference on Electrical and Computer Engineering ◽

10.1109/ccece.2007.168 ◽

2007 ◽

Author(s):

Jie Huang ◽

Jianhua Li ◽

Logan Rakai ◽

Laleh Behjat

Keyword(s):

Physical Design ◽

Clustering Technique ◽

Vlsi Physical Design

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A performance-driven layer assignment algorithm for multiple interconnect trees

1998 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (IEEE Cat. No.98CB36287) ◽

10.1109/iccad.1998.742861 ◽

2002 ◽

Author(s):

P. Saxena ◽

C.L. Liu

Keyword(s):

Assignment Algorithm ◽

Layer Assignment ◽

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VLSI physical design analyzer: A profiling and data mining tool

10.1117/12.2087078 ◽

2015 ◽

Author(s):

Shikha Somani ◽

Piyush Verma ◽

Sriram Madhavan ◽

Fadi Batarseh ◽

Robert C. Pack ◽

...

Keyword(s):

Data Mining ◽

Physical Design ◽

Data Mining Tool ◽

Vlsi Physical Design ◽

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Wire-routing machines—new tools for VLSI physical design

Microelectronics Reliability ◽

10.1016/0026-2714(83)90887-9 ◽

1983 ◽

Vol 23 (6) ◽

pp. 1180

Keyword(s):

Physical Design ◽

Wire Routing ◽

Vlsi Physical Design

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Wire-routing machines—new tools for VLSI physical design

Microelectronics Journal ◽

10.1016/s0026-2692(85)80230-5 ◽

1985 ◽

Vol 16 (2) ◽

pp. 60

Keyword(s):

Physical Design ◽

Wire Routing ◽

Vlsi Physical Design

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A Tabu-Based Partitioning and Layer Assignment Algorithm for 3-D FPGAs

IEEE Embedded Systems Letters ◽

10.1109/les.2011.2161571 ◽

2011 ◽

Vol 3 (3) ◽

pp. 97-100 ◽

Author(s):

Kostas Siozios ◽

Dimitrios Soudris

Keyword(s):

Assignment Algorithm ◽

Layer Assignment

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