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Low-Latency Turbo Decoder Design by Concurrent Decoding of Component Codes
2008 3rd International Conference on Innovative Computing Information and Control
◽
10.1109/icicic.2008.341
◽
2008
◽
Cited By ~ 3
Author(s):
Ya-Cheng Lu
◽
Tso-Cho Chen
◽
Erl-Huei Lu
Keyword(s):
Low Latency
◽
Turbo Decoder
◽
Decoder Design
Download Full-text
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Cited By
References
Energy-Conscious Turbo Decoder Design: A Joint Signal Processing and Transmit Energy Reduction Approach
IEEE Transactions on Vehicular Technology
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10.1109/tvt.2013.2263234
◽
2013
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Vol 62
(8)
◽
pp. 3627-3638
◽
Cited By ~ 3
Author(s):
Liang Li
◽
Robert G. Maunder
◽
Bashir M. Al-Hashimi
◽
Mark Zwolinski
◽
Lajos Hanzo
Keyword(s):
Signal Processing
◽
Energy Reduction
◽
Turbo Decoder
◽
Decoder Design
◽
Reduction Approach
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High-throughput turbo decoder design with new interconnection network for LTE/LTE-A system
2012 International SoC Design Conference (ISOCC)
◽
10.1109/isocc.2012.6407109
◽
2012
◽
Author(s):
Jen-Yu Hou
◽
Tsao-Shuan Lee
◽
Pei-Yun Tsai
Keyword(s):
High Throughput
◽
Interconnection Network
◽
Turbo Decoder
◽
Decoder Design
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Reconfigurable Parallel Turbo Decoder Design for Multiple High-Mobility 4G Systems
Journal of Signal Processing Systems
◽
10.1007/s11265-013-0735-5
◽
2013
◽
Vol 73
(2)
◽
pp. 109-122
◽
Cited By ~ 10
Author(s):
Cheng-Hung Lin
◽
Chun-Yu Chen
◽
En-Jui Chang
◽
An-Yeu Wu
Keyword(s):
High Mobility
◽
Turbo Decoder
◽
Decoder Design
◽
4G Systems
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A Parallel Decoder Design for Low Latency Turbo Decoding
Second International Conference on Innovative Computing, Informatio and Control (ICICIC 2007)
◽
10.1109/icicic.2007.73
◽
2007
◽
Cited By ~ 5
Author(s):
Ya-Cheng Lu
◽
Erl-Huei Lu
Keyword(s):
Low Latency
◽
Turbo Decoding
◽
Decoder Design
Download Full-text
Parallel turbo decoder using a low-latency Max-Log-MAP kernel for a VLIW DSP
10.1117/12.445228
◽
2001
◽
Author(s):
Yingtao Jiang
◽
Jun Ma
◽
Ali Saidi
◽
Yuke Wang
Keyword(s):
Low Latency
◽
Turbo Decoder
◽
Vliw Dsp
◽
Log Map
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Power-efficient turbo-decoder design based on algorithm-specific power domain partitioning
2014 24th International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)
◽
10.1109/patmos.2014.6951907
◽
2014
◽
Author(s):
Christoph Roth
◽
Christian Benkeser
◽
Qiuting Huang
Keyword(s):
Specific Power
◽
Power Efficient
◽
Turbo Decoder
◽
Power Domain
◽
Domain Partitioning
◽
Decoder Design
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A New Low Latency Parallel Turbo Decoder Employing Parallel Phase Decoding Method
Algorithms and Architectures for Parallel Processing - Lecture Notes in Computer Science
◽
10.1007/978-3-642-33065-0_14
◽
2012
◽
pp. 130-139
Author(s):
Wen-Ta Lee
◽
Min-Sheng Chang
◽
Wei-Chieh Shen
Keyword(s):
Low Latency
◽
Turbo Decoder
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Implementation Issues: A Turbo Decoder Design Case Study
Iterative Detection
◽
10.1007/978-1-4615-1699-6_6
◽
2001
◽
pp. 315-340
Author(s):
Peter A. Beerel
Keyword(s):
Turbo Decoder
◽
Design Case
◽
Decoder Design
◽
Design Case Study
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Reconfigurability-power trade-offs in turbo decoder design and implementation
IEEE Computer Society Annual Symposium on VLSI
◽
10.1109/isvlsi.2004.1339534
◽
2004
◽
Cited By ~ 1
Author(s):
I. Atluri
◽
T. Arslan
Keyword(s):
Turbo Decoder
◽
Design And Implementation
◽
Trade Offs
◽
Decoder Design
◽
Power Trade
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Turbo decoder design for advanced T-DMB baseband receiver SoC
2010 Digest of Technical Papers International Conference on Consumer Electronics (ICCE)
◽
10.1109/icce.2010.5418772
◽
2010
◽
Author(s):
Hyuk Kim
◽
Juehyun Lee
◽
Jinkyu Kim
◽
Duckwhan Kim
◽
Bon-tae Koo
Keyword(s):
Turbo Decoder
◽
Baseband Receiver
◽
Decoder Design
Download Full-text
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