Performance Improvement and Energy Saving Based on Increasing Locality of Persistent Data in Embedded Systems

Author(s):  
Johannes Loinig ◽  
Philipp Maria Glatz ◽  
Christian Steger ◽  
Reinhold Weiss
2015 ◽  
Vol 7 (4) ◽  
pp. 93-96 ◽  
Author(s):  
Le-Tian Huang ◽  
Hui Dong ◽  
Jun-Shi Wang ◽  
Masoud Daneshtalab ◽  
Guang-Jun Li

2014 ◽  
Vol 2014 ◽  
pp. 1-8 ◽  
Author(s):  
Yang-Hsin Fan ◽  
Jan-Ou Wu ◽  
San-Fu Wang

Embedded system works everywhere for repeatedly performing a few particular functionalities. Well-known products include consumer electronics, smart home applications, and telematics device, and so forth. Recently, developing methodology of embedded systems is applied to conduct the design of cloud embedded system resulting in the applications of embedded system being more diverse. However, the more energy consumes result from the more embedded system works. This study presents hyperrectangle technology (HT) to embedded system for obtaining energy saving. The HT adopts drift effect to construct embedded systems with more hardware circuits than software components or vice versa. It can fast construct embedded system with a set of hardware circuits and software components. Moreover, it has a great benefit to fast explore energy consumption for various embedded systems. The effects are presented by assessing a JPEG benchmarks. Experimental results demonstrate that the HT, respectively, achieves the energy saving by 29.84%, 2.07%, and 68.80% on average to GA, GHO, and Lin.


2012 ◽  
Vol 516-517 ◽  
pp. 140-145 ◽  
Author(s):  
Jian Min Su ◽  
Nan Hu

Aiming at high power consumption by auxiliaries of circulating fluidized bed (CFB) boiler, combustion tests were carried out on a 300MW inferior anthracite fired CFB boiler to decrease the bed material inventory via energy saving combustion technologies for CFB boiler based on fluidization reconstruction. The effects of fluidization reconstruction on boiler performance improvement were analyzed. Application practices show that after fluidization reconstruction, the power consumed by auxiliaries of the CFB boiler decreases obviously. Auxiliary power ratio of the 300MW boiler unit has been reduced from 6.1% to 4.3%. The erosion of boiler heating surface has been alleviated obviously.


Processor caches have fixed line size. A processor cache defined by tuple (C, k, L) where C is the capacity, k associativity and L line size has fixed values for the parameters. Algorithms to have variable processor cache line size are proposed in literature. This paper proposes algorithm to have variable cache line size based on the miss count for any application. The line size is varied by increasing or decreasing line size based on the miss count for any time interval. The algorithm can be used in running any application. The SPEC2000 benchmarks are used for simulating the proposed algorithm for cache with one level. The average memory access time is chosen as performance parameter. A performance improvement of 12% is observed with energy saving of 18% for chosen parameters.


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