Output bit selection for test response compaction based on a single counter

2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology ◽

10.1109/icsict.2012.6467671 ◽

2012 ◽

Author(s):

Kuen-Jong Lee ◽

Wei-Cheng Lien ◽

Tong-Yu Hsieh

Keyword(s):

Test Response ◽

Test Response Compaction ◽

Selection For ◽

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Output selection for test response compaction based on multiple counters

Technical Papers of 2014 International Symposium on VLSI Design, Automation and Test ◽

10.1109/vlsi-dat.2014.6834865 ◽

2014 ◽

Author(s):

Wei-Cheng Lien ◽

Kuen-Jong Lee ◽

Krishnendu Chakrabarty ◽

Tong-Yu Hsieh

Keyword(s):

Test Response ◽

Test Response Compaction ◽

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Accumulator-based output selection for test response compaction

2012 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2012.6271757 ◽

2012 ◽

Author(s):

Wei-Cheng Lien ◽

Kuen-Jong Lee ◽

Tong-Yu Hsieh ◽

Shih-Shiun Chien ◽

Krishnendu Chakrabarty

Keyword(s):

Test Response ◽

Test Response Compaction ◽

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Counter-Based Output Selection for Test Response Compaction

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2012.2214479 ◽

2013 ◽

Vol 32 (1) ◽

pp. 152-164 ◽

Author(s):

Wei-Cheng Lien ◽

Kuen-Jong Lee ◽

Tong-Yu Hsieh ◽

Krishnendu Chakrabarty ◽

Yu-Hua Wu

Keyword(s):

Test Response ◽

Test Response Compaction ◽

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Test response compaction using arithmetic functions

Proceedings of 14th VLSI Test Symposium ◽

10.1109/vtest.1996.510882 ◽

2002 ◽

Author(s):

A.P. Stroele

Keyword(s):

Arithmetic Functions ◽

Test Response ◽

Test Response Compaction

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Scan Test Response Compaction Combined with Diagnosis Capabilities

Journal of Electronic Testing ◽

10.1007/s10836-007-5043-1 ◽

2008 ◽

Vol 24 (1-3) ◽

pp. 235-246 ◽

Author(s):

Sverre Wichlund ◽

Frank Berntsen ◽

Einar Johan Aas

Keyword(s):

Test Response ◽

Scan Test ◽

Test Response Compaction

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Test Response Compaction in VLSI BIST with Array of Two-Input Linear Logic

Artificial Intelligence and Applications / 718: Modelling, Identification, and Control ◽

10.2316/p.2011.718-048 ◽

2011 ◽

Author(s):

Sunil R. Das ◽

Alexander R. Applegate

Keyword(s):

Linear Logic ◽

Test Response ◽

Test Response Compaction

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Test response compaction using multiplexed parity trees

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.543772 ◽

1996 ◽

Vol 15 (11) ◽

pp. 1399-1408 ◽

Author(s):

K. Chakrabarty ◽

J.P. Hayes

Keyword(s):

Test Response ◽

Test Response Compaction

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X-Tolerant Test Response Compaction

IEEE Design & Test of Computers ◽

10.1109/mdt.2005.154 ◽

2005 ◽

Vol 22 (6) ◽

pp. 566-574 ◽

Author(s):

S. Mitra ◽

S.S. Lumetta ◽

M. Mitzenmacher ◽

N. Patil

Keyword(s):

Test Response ◽

Test Response Compaction

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ATE assisted test response compaction

Proceedings of 2010 International Symposium on VLSI Design, Automation and Test ◽

10.1109/vdat.2010.5496704 ◽

2010 ◽

Author(s):

J. M. Howard ◽

S. M. Reddy ◽

I. Pomeranz

Keyword(s):

Test Response ◽

Test Response Compaction

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Isolation of Failing Scan Cells through Convolutional Test Response Compaction

Journal of Electronic Testing ◽

10.1007/s10836-006-9524-4 ◽

2007 ◽

Vol 23 (1) ◽

pp. 35-45

Author(s):

Grzegorz Mrugalski ◽

Janusz Rajski ◽

Chen Wang ◽

Artur Pogiel ◽

Jerzy Tyszer

Keyword(s):

Test Response ◽

Test Response Compaction

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