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Design of Frequency Multiplier with Delay Locked Loop that is insensitive to PVT Variation and prescreen Harmonic Lock
Mapping Intimacies
◽
10.1109/icufn49451.2021.9528610
◽
2021
◽
Author(s):
Ho Won Kim
◽
Kang Yoon Lee
Keyword(s):
Frequency Multiplier
◽
Delay Locked Loop
◽
Pvt Variation
Download Full-text
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Cited By
References
All-Digital Delay-Locked Loop-based Frequency Multiplier Operating from 4.0GHz to 5.6GHz
2020 International Conference on Electrical, Communication, and Computer Engineering (ICECCE)
◽
10.1109/icecce49384.2020.9179330
◽
2020
◽
Author(s):
Hakeem Dad Khan
◽
Erkan Bayram
◽
Oner Hanay
◽
Suramate Chalermwisutkul
◽
Renato Negra
Keyword(s):
Frequency Multiplier
◽
Delay Locked Loop
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A CMOS Delay-Locked Loop Based Frequency Multiplier for Wide-range Operation
2005 IEEE Conference on Electron Devices and Solid-State Circuits
◽
10.1109/edssc.2005.1635296
◽
2006
◽
Cited By ~ 8
Author(s):
Tung-Hui Su Ro-Min Weng
Keyword(s):
Frequency Multiplier
◽
Delay Locked Loop
◽
Wide Range
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Proportional Static-Phase-Error Reduction for Frequency-Multiplier-Based Delay-Locked-Loop Architecture
IEICE Transactions on Electronics
◽
10.1587/transele.e99.c.655
◽
2016
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Vol E99.C
(6)
◽
pp. 655-658
Author(s):
Yo-Hao TU
◽
Jen-Chieh LIU
◽
Kuo-Hsing CHENG
Keyword(s):
Phase Error
◽
Error Reduction
◽
Frequency Multiplier
◽
Delay Locked Loop
◽
Static Phase
◽
Static Phase Error
Download Full-text
Design of Multiplying Delay Locked Loop that prevents Harmonic Lock and is insensitive to PVT Variation
10.1109/isocc53507.2021.9613946
◽
2021
◽
Author(s):
Ho Won Kim
◽
Kang Yoon Lee
Keyword(s):
Delay Locked Loop
◽
Pvt Variation
Download Full-text
Frequency Multiplier with Delay Locked Loop -Based Clock Generator for System on Chip Applications
Advanced Aspects of Engineering Research Vol. 4
◽
10.9734/bpi/aaer/v4/7685d
◽
2021
◽
pp. 123-131
Author(s):
G. Prasanna Kumar
◽
J. Prabhakar
◽
Nagulancha Raju
Keyword(s):
System On Chip
◽
Frequency Multiplier
◽
Clock Generator
◽
Delay Locked Loop
◽
On Chip
Download Full-text
A CMOS 2.4GHz Delay-Locked Loop Based Programmable Frequency Multiplier
2006 Digest of Technical Papers International Conference on Consumer Electronics
◽
10.1109/icce.2006.1598465
◽
2006
◽
Author(s):
Ro-Min Weng
◽
Tung-Hui Su
◽
Chuan-Yu Liu
Keyword(s):
Frequency Multiplier
◽
Delay Locked Loop
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Frequency multiplier
AccessScience
◽
10.1036/1097-8542.272300
◽
2015
◽
Keyword(s):
Frequency Multiplier
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Assessment of the Delay-Locked Loop Error due to Multipath Models Regarding a Deterministic-stochastic Channel and a GPS L1 Receiver Model for Kinematic Trajectories
Proceedings of the 31st International Technical Meeting of The Satellite Division of the Institute of Navigation (ION GNSS+ 2018)
◽
10.33012/2018.15871
◽
2018
◽
Author(s):
Alexandra Avram
◽
Noha El Gemayel
◽
Volker Schwieger
Keyword(s):
Delay Locked Loop
◽
Receiver Model
Download Full-text
Millimeter-Wave Planar Frequency Multiplier
Telecommunications and Radio Engineering
◽
10.1615/telecomradeng.v60.i12.110
◽
2003
◽
Vol 60
(1-2)
◽
pp. 100-103
Author(s):
G. P. Ermak
◽
V. P. Kochergin
◽
P. V. Kupriyanov
Keyword(s):
Millimeter Wave
◽
Frequency Multiplier
Download Full-text
Simulation of a Nonlinear Frequency Multiplier using the FDTD Technique
2020 International Applied Computational Electromagnetics Society Symposium (ACES)
◽
10.23919/aces49320.2020.9196126
◽
2020
◽
Author(s):
Joshua M. Kast
◽
Atef Z. Elsherbeni
Keyword(s):
Frequency Multiplier
◽
Nonlinear Frequency
Download Full-text
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