A Less Complex and Effective Approach to Design Current Sample-and-Hold Circuits with Clock Generation for use on Current Mode ADCs

2018 3rd International Symposium on Instrumentation Systems, Circuits and Transducers (INSCIT) ◽

10.1109/inscit.2018.8546693 ◽

2018 ◽

Author(s):

Cleber V. R. Almeida ◽

Amauri Oliveira ◽

Raimundo C. S. Freire

Keyword(s):

Current Mode ◽

Clock Generation ◽

Sample And Hold ◽

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A 1 V operational, 20 MS/s and 57 dB of S/N, current-mode CMOS sample-and-hold IC

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) ◽

10.1109/vlsic.2001.934240 ◽

2002 ◽

Author(s):

Y. Sugimoto

Keyword(s):

Current Mode ◽

Sample And Hold

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Sample and hold effect in PWM DC-DC converters with peak current-mode control

2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512) ◽

10.1109/iscas.2004.1329944 ◽

2004 ◽

Author(s):

B. Bryant ◽

M.K. Kazimierczuk

Keyword(s):

Current Mode ◽

Peak Current ◽

Current Mode Control ◽

Mode Control ◽

Sample And Hold ◽

Peak Current Mode Control

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A 1.5V 150MS/s current-mode sample-and-hold circuit

Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005. ◽

10.1109/ecctd.2005.1523000 ◽

2006 ◽

Author(s):

B. Sedighi ◽

O. Rajaee ◽

A. Jahanian ◽

M.S. Bakhtiar

Keyword(s):

Current Mode ◽

Sample And Hold

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A switched-current sample and hold circuit for low frequency applications

ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196) ◽

10.1109/iscas.2001.921890 ◽

2002 ◽

Author(s):

E. de Lira Mendes ◽

P. Loumeau ◽

J.-F. Naviner

Keyword(s):

Low Frequency ◽

Sample And Hold ◽

Switched Current ◽

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A 24nW, 0.65-V, 74-dB SNDR, 83-dB DR, class-AB current-mode sample and hold circuit

Proceedings of 2010 IEEE International Symposium on Circuits and Systems ◽

10.1109/iscas.2010.5537963 ◽

2010 ◽

Author(s):

Chutham Sawigun ◽

Wouter A. Serdijn

Keyword(s):

Current Mode ◽

Class Ab ◽

Sample And Hold

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Low-voltage, high-speed, and high-precision current-mode sample-and-hold circuit

Electronics and Communications in Japan (Part II Electronics) ◽

10.1002/ecjb.4420780708 ◽

1995 ◽

Vol 78 (7) ◽

pp. 68-81 ◽

Author(s):

Yasuhiro Sugimoto ◽

Hisao Kakitani ◽

Hiroyuki Tsurumi

Keyword(s):

High Precision ◽

Low Voltage ◽

Current Mode ◽

Sample And Hold

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A self-biased PLL with current-mode filter for clock generation

ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005. ◽

10.1109/isscc.2005.1494048 ◽

2005 ◽

Author(s):

Gang Yan ◽

Chenxiao Ren ◽

Zhendong Guo ◽

Qing Ouyang ◽

Zhongyuan Chang

Keyword(s):

Current Mode ◽

Clock Generation

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A 1.6 V 10-bit 20 MHz current-mode sample and hold circuit

Proceedings of ISCAS'95 - International Symposium on Circuits and Systems ◽

10.1109/iscas.1995.520392 ◽

2002 ◽

Author(s):

Y. Sugimoto

Keyword(s):

Current Mode ◽

Sample And Hold

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A current-mode sample-and-hold circuit with high accuracy

10.1109/isspa.2007.4555319 ◽

2007 ◽

Author(s):

Mustafa Cem Ozkilic ◽

Shahram Minaei ◽

Sait Turkoz

Keyword(s):

Current Mode ◽

High Accuracy ◽

Sample And Hold ◽

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A 35MS/s and 2V/2.5V Current-mode Sample-and-Hold Circuit with an Input Current Linearization Technique

2005 IEEE Asian Solid-State Circuits Conference ◽

10.1109/asscc.2005.251761 ◽

2005 ◽

Author(s):

Yasuhiro Sugimoto ◽

Yuji Gohda ◽

Shigeto Tanaka

Keyword(s):

Current Mode ◽

Input Current ◽

Linearization Technique ◽

Sample And Hold

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