2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)
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Published By Japan Soc. Appl. Phys

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A 0.13 μm 6 GHz 256×32b leakage-tolerant register file

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) ◽

10.1109/vlsic.2001.934182 ◽

2002 ◽

Author(s):

R. Krishnamurthy ◽

A. Alvandpour ◽

G. Balamurugan ◽

N. Shanbhagh ◽

K. Soumyanath ◽

...

Keyword(s):

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A 1 V operational, 20 MS/s and 57 dB of S/N, current-mode CMOS sample-and-hold IC

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) ◽

10.1109/vlsic.2001.934240 ◽

2002 ◽

Cited By ~ 1

Author(s):

Y. Sugimoto

Keyword(s):

Current Mode ◽

Sample And Hold

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A 1 GHz power efficient single chip multiprocessor system for broadband networking applications

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) ◽

10.1109/vlsic.2001.934209 ◽

2002 ◽

Cited By ~ 4

Author(s):

S. Santhanam ◽

R. Allmon ◽

K. Anne ◽

R. Blake ◽

N. Bunger ◽

...

Keyword(s):

Chip Multiprocessor ◽

Multiprocessor System ◽

Single Chip ◽

Power Efficient

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Dynamically reconfigurable logic LSI-PCA-1

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) ◽

10.1109/vlsic.2001.934208 ◽

2002 ◽

Cited By ~ 2

Author(s):

H. Ito ◽

R. Konishi ◽

H. Nakada ◽

K. Oguri ◽

A. Nagoya ◽

...

Keyword(s):

Reconfigurable Logic ◽

Dynamically Reconfigurable

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An area-efficient 2 GB/s 256 Mb packet-based DRAM with daisy-chained redundancy scheme

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) ◽

10.1109/vlsic.2001.934187 ◽

2002 ◽

Cited By ~ 1

Author(s):

B.-S. Moon ◽

J.-W. Chai ◽

J.-S. Kim ◽

S.-M. Yim ◽

S.-A. Kim ◽

...

Keyword(s):

Area Efficient

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A 0.5 V power-supply scheme for low power LSIs using multi-Vt SOI CMOS technology

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) ◽

10.1109/vlsic.2001.934245 ◽

2002 ◽

Cited By ~ 4

Author(s):

T. Fuse ◽

A. Kameyama ◽

M. Ohta ◽

K. Ohuchi

Keyword(s):

Low Power ◽

Power Supply ◽

Cmos Technology ◽

Soi Cmos

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A micropower log-domain filter using enhanced lateral PNPs in a 0.25 μm CMOS process

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) ◽

10.1109/vlsic.2001.934231 ◽

2002 ◽

Cited By ~ 2

Author(s):

N. Krishnapura ◽

Y. Tsividis

Keyword(s):

Cmos Process ◽

Log Domain

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A single-chip 2.4 GHz direct-conversion CMOS transceiver with GFSK modem for Bluetooth application

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) ◽

10.1109/vlsic.2001.934253 ◽

2002 ◽

Cited By ~ 3

Author(s):

Seung-Wook Lee ◽

Kang-Yoon Lee ◽

Eunseok Song ◽

Yeon-Jae Jung ◽

Hoisam Jeong ◽

...

Keyword(s):

Direct Conversion ◽

Single Chip

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A 63 μW-standby-power microcontroller with on-chip hybrid regulator scheme

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) ◽

10.1109/vlsic.2001.934247 ◽

2002 ◽

Cited By ~ 3

Author(s):

M. Hiraki ◽

T. Ito ◽

K. Ashiga ◽

A. Fujiwara ◽

T. Ohashi ◽

...

Keyword(s):

Standby Power ◽

On Chip

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A 1.8 GHz CMOS VCO with reduced phase noise

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) ◽

10.1109/vlsic.2001.934213 ◽

2002 ◽

Cited By ~ 7

Author(s):

P. Andreani ◽

H. Sjoland

Keyword(s):

Phase Noise

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2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By Japan Soc. Appl. Phys

A 0.13 μm 6 GHz 256×32b leakage-tolerant register file

A 1 V operational, 20 MS/s and 57 dB of S/N, current-mode CMOS sample-and-hold IC

A 1 GHz power efficient single chip multiprocessor system for broadband networking applications

Dynamically reconfigurable logic LSI-PCA-1

An area-efficient 2 GB/s 256 Mb packet-based DRAM with daisy-chained redundancy scheme

A 0.5 V power-supply scheme for low power LSIs using multi-Vt SOI CMOS technology

A micropower log-domain filter using enhanced lateral PNPs in a 0.25 μm CMOS process

A single-chip 2.4 GHz direct-conversion CMOS transceiver with GFSK modem for Bluetooth application

A 63 μW-standby-power microcontroller with on-chip hybrid regulator scheme

A 1.8 GHz CMOS VCO with reduced phase noise

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)
Latest Publications