Peak power reduction of a sensor network processor fabricated with Deeply Depleted Channel transistors in 65nm technology
Keyword(s):
2007 ◽
Vol 43
(4)
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pp. 1499-1509
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2008 ◽
Vol E91-B
(5)
◽
pp. 1454-1462
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Keyword(s):
2005 ◽
Vol E88-A
(7)
◽
pp. 1897-1902
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Keyword(s):