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A 1.5 ns 32 b CMOS ALU in double pass-transistor logic
1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers
◽
10.1109/isscc.1993.280071
◽
1993
◽
Cited By ~ 49
Author(s):
M. Suzuki
◽
N. Ohkubo
◽
T. Yamanaka
◽
A. Shimizu
◽
K. Sasaki
Keyword(s):
Double Pass
◽
Pass Transistor
◽
Pass Transistor Logic
Download Full-text
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Novel CMOS static ternary logic using double pass-transistor logic
The 2nd International Conference on Information Science and Engineering
◽
10.1109/icise.2010.5689867
◽
2010
◽
Cited By ~ 5
Author(s):
Guoqiang Hang
◽
Xuanchang Zhou
Keyword(s):
Ternary Logic
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Double Pass
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Pass Transistor
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A Novel Binary to Ternary Converter using Double Pass-Transistor Logic
2019 31st International Conference on Microelectronics (ICM)
◽
10.1109/icm48031.2019.9021886
◽
2019
◽
Author(s):
Ramzi A. Jaber
◽
Ahmad M. El-Hajj
◽
Ali M. Haidar
◽
Abdallah Kassem
◽
Lina A. Nimri
Keyword(s):
Double Pass
◽
Pass Transistor
◽
Pass Transistor Logic
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A 1.5-ns 32-b CMOS ALU in double pass-transistor logic
IEEE Journal of Solid-State Circuits
◽
10.1109/4.245595
◽
1993
◽
Vol 28
(11)
◽
pp. 1145-1151
◽
Cited By ~ 127
Author(s):
M. Suzuki
◽
N. Ohkubo
◽
T. Shinbo
◽
T. Yamanaka
◽
A. Shimizu
◽
...
Keyword(s):
Double Pass
◽
Pass Transistor
◽
Pass Transistor Logic
Download Full-text
Novel CMOS ternary flip-flops using double pass-transistor logic
2011 International Conference on Electric Information and Control Engineering
◽
10.1109/iceice.2011.5778391
◽
2011
◽
Cited By ~ 4
Author(s):
Guoqiang Hang
◽
Xuanchang Zhou
Keyword(s):
Double Pass
◽
Pass Transistor
◽
Pass Transistor Logic
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Design of quaternary logic gate using double pass-transistor logic with neuron MOS down literal circuit
Proceedings. 34th International Symposium on Multiple-Valued Logic
◽
10.1109/ismvl.2004.1319941
◽
2004
◽
Cited By ~ 13
Author(s):
Soo Jin Park
◽
Byoung Hee Yoon
◽
Kwang Sub Yoon
◽
Heung Soo Kim
Keyword(s):
Logic Gate
◽
Double Pass
◽
Quaternary Logic
◽
Pass Transistor
◽
Pass Transistor Logic
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Double pass-transistor logic for high performance wave pipeline circuits
Proceedings Eleventh International Conference on VLSI Design
◽
10.1109/icvd.1998.646655
◽
2002
◽
Cited By ~ 8
Author(s):
R.S. Parthasarathy
◽
R. Sridhar
Keyword(s):
High Performance
◽
Double Pass
◽
Pass Transistor
◽
Pass Transistor Logic
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Dynamic Ternary Logic Gate Using Neuron-MOS Literal Circuit and Double Pass-Transistor Logic
2016 12th International Conference on Computational Intelligence and Security (CIS)
◽
10.1109/cis.2016.0027
◽
2016
◽
Cited By ~ 1
Author(s):
Guoqiang Hang
◽
Yang Yang
◽
Danyan Zhang
◽
Xiaohui Hu
Keyword(s):
Logic Gate
◽
Ternary Logic
◽
Double Pass
◽
Pass Transistor
◽
Pass Transistor Logic
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A high signal swing pass-transistor logic using surrounding gate transistor
2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)
◽
10.1109/sispad.2000.871261
◽
2002
◽
Cited By ~ 1
Author(s):
T. Endoh
◽
T. Funaki
◽
H. Sakuraba
◽
F. Masuoka
Keyword(s):
High Signal
◽
Surrounding Gate
◽
Pass Transistor
◽
Pass Transistor Logic
◽
Signal Swing
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CMOS differential pass-transistor logic (CMOS DPTL) predischarge buffer design
Thirteenth National Radio Science Conference. NRSC '96
◽
10.1109/nrsc.1996.551142
◽
2002
◽
Author(s):
S.I. Kayed
◽
H.F. Ragaei
Keyword(s):
Buffer Design
◽
Pass Transistor
◽
Pass Transistor Logic
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Digital compressor structure in neural network implementation using complex complementary pass-transistor logic (C/sup 2/PL)
Proceedings of 1994 37th Midwest Symposium on Circuits and Systems
◽
10.1109/mwscas.1994.519282
◽
2002
◽
Author(s):
D. Zhang
◽
M. Kamel
◽
M.I. Elmasry
Keyword(s):
Neural Network
◽
Pass Transistor
◽
Pass Transistor Logic
Download Full-text
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