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A 10.1-ENOB, 6.2-fJ/conv.-step, 500-MS/s, Ringamp-Based Pipelined-SAR ADC With Background Calibration and Dynamic Reference Regulation in 16-nm CMOS
IEEE Journal of Solid-State Circuits
◽
10.1109/jssc.2021.3133829
◽
2022
◽
pp. 1-1
Author(s):
Jorge Lagos
◽
Nereo Markulic
◽
Benjamin Hershberg
◽
Davide Dermit
◽
Mithlesh Shrivas
◽
...
Keyword(s):
Sar Adc
◽
Background Calibration
Download Full-text
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A 1GS/s 10bit SAR ADC with background calibration in 28nm CMOS
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10.1016/j.mejo.2021.105120
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pp. 105120
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Sar Adc
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A 91.0-dB SFDR Single-Coarse Dual-Fine Pipelined-SAR ADC With Split-Based Background Calibration in 28-nm CMOS
IEEE Transactions on Circuits and Systems I Regular Papers
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◽
2020
◽
pp. 1-14
Author(s):
Yuefeng Cao
◽
Shumin Zhang
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Tianli Zhang
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Yongzhen Chen
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...
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Sar Adc
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Background Calibration
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Time‐interleaved SAR ADC design with background calibration
International Journal of Circuit Theory and Applications
◽
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◽
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pp. 321-334
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Keyword(s):
Sar Adc
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Background Calibration
◽
Time Interleaved
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A digital background calibration technique for SAR ADC based on capacitor swapping
IEICE Electronics Express
◽
10.1587/elex.11.20140325
◽
2014
◽
Vol 11
(12)
◽
pp. 20140325-20140325
Author(s):
Ling Du
◽
Ning Ning
◽
Shuangyi Wu
◽
Qi Yu
◽
Yang Liu
Keyword(s):
Sar Adc
◽
Background Calibration
◽
Calibration Technique
◽
Digital Background Calibration
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A 14bits 1GSPS Pipelined-SAR ADC with digital background calibration
2020 IEEE 15th International Conference on Solid-State & Integrated Circuit Technology (ICSICT)
◽
10.1109/icsict49897.2020.9278223
◽
2020
◽
Author(s):
Xizhu Peng
◽
Zhuoqun Zhong
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Na Wu
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Ruogu Hua
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Yuefeng Li
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Keyword(s):
Sar Adc
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Background Calibration
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Digital Background Calibration
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A 10-bit 1.2 GS/s 45 mW time-interleaved SAR ADC with background calibration
IEICE Electronics Express
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Xu Dai-guo
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Keyword(s):
Sar Adc
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Background Calibration
◽
Time Interleaved
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14b SAR ADC with ODC Background Calibration
Problems of advanced micro- and nanoelectronic systems development
◽
10.31114/2078-7707-2018-4-30-35
◽
2018
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pp. 30-35
Author(s):
A.A. Rybakov
◽
D. Sergeychuk
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Keyword(s):
Sar Adc
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A 10-bit 800MS/S low power time-interleaved SAR ADC with background calibration
2016 13th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT)
◽
10.1109/icsict.2016.7998772
◽
2016
◽
Author(s):
Jie Pu
◽
Daiguo Xu
◽
Yuxin Wang
◽
Ruitao Zhang
Keyword(s):
Low Power
◽
Sar Adc
◽
Background Calibration
◽
Time Interleaved
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Redundant Double Conversion based Digital Background Calibration of SAR ADC with Convergence Acceleration and Assistance
2018 25th International Conference "Mixed Design of Integrated Circuits and System" (MIXDES)
◽
10.23919/mixdes.2018.8436826
◽
2018
◽
Author(s):
Xiang Ding
◽
Klaus Hofmann
◽
Liang Zhang
◽
Dongbai Yi
◽
Yingjiang Ma
Keyword(s):
Convergence Acceleration
◽
Sar Adc
◽
Background Calibration
◽
Digital Background Calibration
Download Full-text
A 10.0 ENOB, 6.2 fJ/conv.-step, 500 MS/s Ringamp-Based Pipelined-SAR ADC with Background Calibration and Dynamic Reference Regulation in 16nm CMOS
2021 Symposium on VLSI Circuits
◽
10.23919/vlsicircuits52068.2021.9492354
◽
2021
◽
Author(s):
J. Lagos
◽
N. Markulic
◽
B. Hershberg
◽
D. Dermit
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M. Shrivas
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...
Keyword(s):
Sar Adc
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Background Calibration
Download Full-text
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