A 10.0 ENOB, 6.2 fJ/conv.-step, 500 MS/s Ringamp-Based Pipelined-SAR ADC with Background Calibration and Dynamic Reference Regulation in 16nm CMOS

2021 ◽  
Author(s):  
J. Lagos ◽  
N. Markulic ◽  
B. Hershberg ◽  
D. Dermit ◽  
M. Shrivas ◽  
...  
Keyword(s):  
Sar Adc ◽  
Background Calibration

A 1GS/s 10bit SAR ADC with background calibration in 28nm CMOS

2021 ◽  
pp. 105120
Author(s):  
Zheng Qiu ◽  
Yudong Ouyang ◽  
Lijie Yang ◽  
Liqi Sun
Keyword(s):  
Sar Adc ◽  
Background Calibration

A 91.0-dB SFDR Single-Coarse Dual-Fine Pipelined-SAR ADC With Split-Based Background Calibration in 28-nm CMOS

2020 ◽  
pp. 1-14
Author(s):  
Yuefeng Cao ◽  
Shumin Zhang ◽  
Tianli Zhang ◽  
Yongzhen Chen ◽  
Yutong Zhao ◽  
...  
Keyword(s):  
Sar Adc ◽  
Background Calibration ◽  
28 Nm

Time‐interleaved SAR ADC design with background calibration

2020 ◽  
Vol 48 (3) ◽  
pp. 321-334 ◽  
Author(s):  
Muhammed Yasin Adıyaman ◽  
Tufan Coşkun Karalar
Keyword(s):  
Sar Adc ◽  
Background Calibration ◽  
Time Interleaved

scholarly journals A digital background calibration technique for SAR ADC based on capacitor swapping

2014 ◽  
Vol 11 (12) ◽  
pp. 20140325-20140325
Author(s):  
Ling Du ◽  
Ning Ning ◽  
Shuangyi Wu ◽  
Qi Yu ◽  
Yang Liu
Keyword(s):  
Sar Adc ◽  
Background Calibration ◽  
Calibration Technique ◽  
Digital Background Calibration

scholarly journals A 10-bit 1.2 GS/s 45 mW time-interleaved SAR ADC with background calibration

2018 ◽  
Vol 15 (3) ◽  
pp. 20171235-20171235 ◽  
Author(s):  
Xu Dai-guo ◽  
Pu-Jie ◽  
Xu Shi-liu ◽  
Zhang Zheng-ping ◽  
Chen Kai-rang ◽  
...  
Keyword(s):  
Sar Adc ◽  
Background Calibration ◽  
Time Interleaved

A 10.1-ENOB, 6.2-fJ/conv.-step, 500-MS/s, Ringamp-Based Pipelined-SAR ADC With Background Calibration and Dynamic Reference Regulation in 16-nm CMOS

2022 ◽  
pp. 1-1
Author(s):  
Jorge Lagos ◽  
Nereo Markulic ◽  
Benjamin Hershberg ◽  
Davide Dermit ◽  
Mithlesh Shrivas ◽  
...  
Keyword(s):  
Sar Adc ◽  
Background Calibration
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