Precise shared cache analysis using optimal interference placement

2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS) ◽

10.1109/rtas.2014.6925996 ◽

2014 ◽

Author(s):

Kartik Nagar ◽

Y.N. Srikant

Keyword(s):

Shared Cache ◽

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Fast and Precise Worst-Case Interference Placement for Shared Cache Analysis

ACM Transactions on Embedded Computing Systems ◽

10.1145/2854151 ◽

2016 ◽

Vol 15 (3) ◽

pp. 1-26 ◽

Author(s):

Kartik Nagar ◽

Y. N. Srikant

Keyword(s):

Shared Cache ◽

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C^2AFE: Capacity Curve Annotation and Feature Extraction for Shared Cache Analysis

2020 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) ◽

10.1109/ispass48437.2020.00023 ◽

2020 ◽

Author(s):

Cesar Gomes ◽

Mark Hempstead

Keyword(s):

Feature Extraction ◽

Capacity Curve ◽

Shared Cache ◽

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Performance of shared cache for parallel-pipelined computer systems

ACM SIGARCH Computer Architecture News ◽

10.1145/1067651.801646 ◽

1983 ◽

Vol 11 (3) ◽

pp. 117-123 ◽

Author(s):

Phil C. C. Yeh ◽

Janak H. Patel ◽

Edward S. Davidson

Keyword(s):

Computer Systems ◽

Shared Cache ◽

Parallel Pipelined

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Exploring the design space for a shared-cache multiprocessor

ACM SIGARCH Computer Architecture News ◽

10.1145/192007.192026 ◽

1994 ◽

Vol 22 (2) ◽

pp. 166-175 ◽

Author(s):

B. A. Nayfeh ◽

K. Olukotun

Keyword(s):

Design Space ◽

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Shared cache architectures for decision support systems

Performance Evaluation ◽

10.1016/s0166-5316(02)00135-9 ◽

2002 ◽

Vol 49 (1-4) ◽

pp. 283-298 ◽

Author(s):

Michel Dubois ◽

Jaeheon Jeong ◽

Ashwini Nanda

Keyword(s):

Decision Support ◽

Decision Support Systems ◽

Support Systems ◽

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Pthreads Performance Characteristics on Shared Cache CMP, Private Cache CMP and SMP

2010 Second International Conference on Computer Engineering and Applications ◽

10.1109/iccea.2010.44 ◽

2010 ◽

Author(s):

Ian K.T. Tan ◽

Ian Chai ◽

Poo Kuan Hoong

Keyword(s):

Performance Characteristics ◽

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Cache analysis in presence of pointer-based data structures

ACM SIGBED Review ◽

10.1145/2038617.2038618 ◽

2011 ◽

Vol 8 (3) ◽

pp. 7-10 ◽

Author(s):

Tomasz Dudziak ◽

Jörg Herter

Keyword(s):

Data Structures ◽

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Ascertaining Uncertainty for Efficient Exact Cache Analysis

Computer Aided Verification - Lecture Notes in Computer Science ◽

10.1007/978-3-319-63390-9_2 ◽

2017 ◽

pp. 22-40 ◽

Author(s):

Valentin Touzeau ◽

Claire Maïza ◽

David Monniaux ◽

Jan Reineke

Keyword(s):

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Cache- and Communication-aware Application Mapping for Shared-cache Multicore Processors

Lecture Notes in Computer Science - Architecture of Computing Systems – ARCS 2015 ◽

10.1007/978-3-319-16086-3_5 ◽

2015 ◽

pp. 55-67 ◽

Author(s):

Thomas Canhao Xu ◽

Ville Leppänen

Keyword(s):

Multicore Processors ◽

Shared Cache ◽

Application Mapping

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Static Analysis of Run-Time Inter-Core Interferences for Concurrent Programs in Shared Cache Multicore Architectures

Applied Mechanics and Materials ◽

10.4028/www.scientific.net/amm.198-199.523 ◽

2012 ◽

Vol 198-199 ◽

pp. 523-527

Author(s):

Fang Yuan Chen ◽

Dong Song Zhang ◽

Zhi Ying Wang

Keyword(s):

Multicore Processors ◽

Mapping Method ◽

Concurrent Programs ◽

Multicore Architectures ◽

Shared Resources ◽

Shared Cache ◽

Address Mapping ◽

Novel Approach ◽

Worst-Case Execution Time (WCET) is crucial in real-time systems and is very challenging in multicore processors due to the possible runtime inter-thread interferences caused by shared resources. This paper proposes a novel approach to analyze runtime inter-core interferences for consecutive or inconsecutive concurrent programs. Our approach can reasonably estimate runtime inter-core interferences in shared cache by introducing lifetime and instruction fetching timing relations analysis into address mapping method. Compared with the method based on lifetime alone, our proposed approach efficiently improves the tightness of WCET estimation.

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