Cache- and Communication-aware Application Mapping for Shared-cache Multicore Processors

2015 ◽  
pp. 55-67 ◽  
Author(s):  
Thomas Canhao Xu ◽  
Ville Leppänen
Keyword(s):  
Multicore Processors ◽  
Shared Cache ◽  
Application Mapping

Static Analysis of Run-Time Inter-Core Interferences for Concurrent Programs in Shared Cache Multicore Architectures

2012 ◽  
Vol 198-199 ◽  
pp. 523-527
Author(s):  
Fang Yuan Chen ◽  
Dong Song Zhang ◽  
Zhi Ying Wang
Keyword(s):  
Multicore Processors ◽  
Mapping Method ◽  
Concurrent Programs ◽  
Multicore Architectures ◽  
Shared Resources ◽  
Worst Case ◽  
Shared Cache ◽  
Address Mapping ◽  
Novel Approach ◽  
Time Systems

Worst-Case Execution Time (WCET) is crucial in real-time systems and is very challenging in multicore processors due to the possible runtime inter-thread interferences caused by shared resources. This paper proposes a novel approach to analyze runtime inter-core interferences for consecutive or inconsecutive concurrent programs. Our approach can reasonably estimate runtime inter-core interferences in shared cache by introducing lifetime and instruction fetching timing relations analysis into address mapping method. Compared with the method based on lifetime alone, our proposed approach efficiently improves the tightness of WCET estimation.

Performance of shared cache for parallel-pipelined computer systems

1983 ◽  
Vol 11 (3) ◽  
pp. 117-123 ◽  
Author(s):  
Phil C. C. Yeh ◽  
Janak H. Patel ◽  
Edward S. Davidson
Keyword(s):  
Computer Systems ◽  
Shared Cache ◽  
Parallel Pipelined

scholarly journals High Performance Parallelization of COMPSYN on a Cluster of Multicore Processors with GPUs

2012 ◽  
Vol 9 ◽  
pp. 966-975
Author(s):  
Ferdinando Alessi ◽  
Annalisa Massini ◽  
Roberto Basili
Keyword(s):  
High Performance ◽  
Multicore Processors
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