Optimized MAP turbo decoder

2000 IEEE Workshop on SiGNAL PROCESSING SYSTEMS. SiPS 2000. Design and Implementation (Cat. No.00TH8528) ◽

10.1109/sips.2000.886722 ◽

2002 ◽

Author(s):

C. Schurgers ◽

F. Catthoor ◽

M. Engels

Keyword(s):

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A Novel Procedure for Implementing a Turbo Decoder on a GPU with Coalesced Memory Access

IEICE Transactions on Fundamentals of Electronics Communications and Computer Sciences ◽

10.1587/transfun.e100.a.1188 ◽

2017 ◽

Vol E100.A (5) ◽

pp. 1188-1196

Author(s):

Heungseop AHN ◽

Seungwon CHOI

Keyword(s):

Memory Access ◽

Turbo Decoder ◽

Coalesced Memory

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A novel storage scheme for parallel turbo decoder

VTC-2005-Fall. 2005 IEEE 62nd Vehicular Technology Conference, 2005. ◽

10.1109/vetecf.2005.1558448 ◽

2006 ◽

Author(s):

Xiang He ◽

HanWen Luo ◽

HaiBin Zhang

Keyword(s):

Turbo Decoder ◽

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Implementation and Design Space Exploration of a Turbo Decoder in High-Level Synthesis

2019 International Conference on ReConFigurable Computing and FPGAs (ReConFig) ◽

10.1109/reconfig48160.2019.8994787 ◽

2019 ◽

Author(s):

Wesley Stirk ◽

Jeff Goeders

Keyword(s):

Design Space Exploration ◽

Design Space ◽

Space Exploration ◽

High Level Synthesis ◽

Turbo Decoder ◽

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Low-Latency Turbo Decoder Design by Concurrent Decoding of Component Codes

2008 3rd International Conference on Innovative Computing Information and Control ◽

10.1109/icicic.2008.341 ◽

2008 ◽

Author(s):

Ya-Cheng Lu ◽

Tso-Cho Chen ◽

Erl-Huei Lu

Keyword(s):

Low Latency ◽

Turbo Decoder ◽

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Modified turbo decoder for local content in single-frequency networks

IEEE international Symposium on Broadband Multimedia Systems and Broadcasting ◽

10.1109/bmsb.2012.6264312 ◽

2012 ◽

Author(s):

Yonas G. Debessu ◽

Hsiao-Chun Wu ◽

Hong Jiang ◽

Bo Rong

Keyword(s):

Single Frequency ◽

Turbo Decoder ◽

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A Gigabit/Second Turbo Decoder on Field Programmable Gate Array: Supporting Tsat Channel Coding Requirement

MILCOM 2006 ◽

10.1109/milcom.2006.302027 ◽

2006 ◽

Author(s):

Aaron Tu

Keyword(s):

Channel Coding ◽

Field Programmable Gate Array ◽

Turbo Decoder ◽

Field Programmable ◽

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Compression of redundancy free trellis stages in turbo‐decoder

Electronics Letters ◽

10.1049/el.2012.4433 ◽

2013 ◽

Vol 49 (7) ◽

pp. 460-462 ◽

Author(s):

E. Boutillon ◽

J. Sánchez‐Rojas ◽

C. Marchand

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A permutation decomposition based algorithm for the design of prunable interleavers for parallel turbo decoder architectures

10.1109/icc.2006.254902 ◽

2006 ◽

Author(s):

Libero Dinoi ◽

Alberto Tarable ◽

Sergio Benedetto

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A composite sub-optimal approach for hardware implementation of turbo decoder

2013 IEEE International Conference on Communications (ICC) ◽

10.1109/icc.2013.6655279 ◽

2013 ◽

Author(s):

Vanukuru Hari Rohit ◽

Akshay Sharma ◽

Nigar Shaji

Keyword(s):

Hardware Implementation ◽

Turbo Decoder ◽

Optimal Approach

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Implementation and Experimental Results of Rotational OFDM Transmission: Rotational OFDM Performance with Turbo Decoder

2008 IEEE 68th Vehicular Technology Conference ◽

10.1109/vetecf.2008.218 ◽

2008 ◽

Author(s):

Noriaki Miyazaki ◽

Yasuyuki Hatakawa ◽

Toshinori Suzuki

Keyword(s):

Experimental Results ◽

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