Efficient Hybrid Performance Modeling for Analog Circuits Using Hierarchical Shrinkage Priors

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2016.2543021 ◽

2016 ◽

Vol 35 (12) ◽

pp. 2148-2152

Author(s):

Changhai Liao ◽

Jun Tao ◽

Handi Yu ◽

Zhangwen Tang ◽

Yangfeng Su ◽

...

Keyword(s):

Analog Circuits ◽

Performance Modeling ◽

Hybrid Performance ◽

Shrinkage Priors

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Performance modeling of analog circuits using additive regression splines

Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94 ◽

10.1109/cicc.1994.379714 ◽

2002 ◽

Author(s):

C.-Y. Chao ◽

L. Milor

Keyword(s):

Analog Circuits ◽

Performance Modeling ◽

Regression Splines ◽

Additive Regression

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Artificial Neural Network for Performance Modeling and Optimization of CMOS Analog Circuits

International Journal of Computer Applications ◽

10.5120/9380-3731 ◽

2012 ◽

Vol 58 (18) ◽

pp. 6-12 ◽

Author(s):

Mriganka Chakraborty

Keyword(s):

Neural Network ◽

Artificial Neural Network ◽

Analog Circuits ◽

Performance Modeling ◽

Modeling And Optimization ◽

Cmos Analog Circuits ◽

Artificial Neural

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Hybrid performance modeling of open-loop video distribution with VCR functionality

Providing Quality of Service in Heterogeneous Environments, Proceedings of the 18th International Teletraffic Congress - ITC-18 - Teletraffic Science and Engineering ◽

10.1016/s1388-3437(03)80165-8 ◽

2003 ◽

pp. 201-210 ◽

Author(s):

Armin Heindl ◽

Ernst Biersack

Keyword(s):

Performance Modeling ◽

Open Loop ◽

Hybrid Performance ◽

Video Distribution

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A hybrid performance modeling approach for adaptive algorithm selection on hierarchical clusters

ACS/IEEE International Conference on Computer Systems and Applications - AICCSA 2010 ◽

10.1109/aiccsa.2010.5587043 ◽

2010 ◽

Author(s):

Wahid Nasri ◽

Sami Achour

Keyword(s):

Adaptive Algorithm ◽

Performance Modeling ◽

Hybrid Performance ◽

Algorithm Selection ◽

Modeling Approach

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Template-Free Symbolic Performance Modeling of Analog Circuits via Canonical-Form Functions and Genetic Programming

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2009.2021034 ◽

2009 ◽

Vol 28 (8) ◽

pp. 1162-1175 ◽

Author(s):

T. McConaghy ◽

G.G.E. Gielen

Keyword(s):

Genetic Programming ◽

Canonical Form ◽

Analog Circuits ◽

Performance Modeling ◽

Template Free ◽

Symbolic Performance

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Hybrid Performance Modeling for Optimization of In-System-Structural-Test (ISST) Latency

2019 IEEE 37th VLSI Test Symposium (VTS) ◽

10.1109/vts.2019.8758658 ◽

2019 ◽

Author(s):

Milind Sonawane ◽

Venkat Abilash Reddy Nerallapally ◽

Alex Hsu ◽

Shantanu Sarangi

Keyword(s):

Performance Modeling ◽

Hybrid Performance ◽

Structural Test

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Hybrid performance modeling approach for network intensive distributed software

Proceedings of the 6th international workshop on Software and performance - WOSP '07 ◽

10.1145/1216993.1217026 ◽

2007 ◽

Author(s):

Tom Verdickt ◽

Bart Dhoedt ◽

Filip De Turck ◽

Piet Demeester

Keyword(s):

Performance Modeling ◽

Hybrid Performance ◽

Distributed Software ◽

Modeling Approach

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Nonlinear Template-Free Symbolic Performance Modeling for Design and Process Variation Analysis of Analog Circuits

Design of Analog Circuits through Symbolic Analysis ◽

10.2174/978160805095611201010343 ◽

2012 ◽

pp. 343-359 ◽

Keyword(s):

Analog Circuits ◽

Performance Modeling ◽

Process Variation ◽

Variation Analysis ◽

Template Free ◽

Symbolic Performance

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Symbolic time-domain behavioral and performance modeling of linear analog circuits using an efficient symbolic Newton-iteration algorithm for pole extraction

19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) ◽

10.1109/vlsid.2006.153 ◽

2006 ◽

Author(s):

R. Chakraborty ◽

M. Ranjan ◽

R. Vemuri

Keyword(s):

Time Domain ◽

Analog Circuits ◽

Performance Modeling ◽

Newton Iteration ◽

Iteration Algorithm ◽

Linear Analog ◽

And Performance

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Intra- and inter-processor hybrid performance modeling for MPSoC architectures

Proceedings of the 6th IEEE/ACM/IFIP international conference on Hardware/Software codesign and system synthesis - CODES/ISSS '08 ◽

10.1145/1450135.1450156 ◽

2008 ◽

Author(s):

Frank E.B. Ophelders ◽

Samarjit Chakraborty ◽

Henk Corporaal

Keyword(s):

Performance Modeling ◽

Hybrid Performance

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