Efficient Parallel Architecture for Linear Feedback Shift Registers

2015 ◽  
Vol 62 (11) ◽  
pp. 1068-1072 ◽  
Author(s):  
Jaehwan Jung ◽  
Hoyoung Yoo ◽  
Youngjoo Lee ◽  
In-Cheol Park
2017 ◽  
Vol 10 (04) ◽  
pp. 710-717
Author(s):  
A. Ahmad ◽  
D. Al Abri ◽  
S. S. Al Busaidi ◽  
M. M. Bait-Suwailam

The authors show that in a Built-In Self-Test (BIST) technique, based on linear-feedback shift registers, when the feedback connections in pseudo-random test-sequence generator and signature analyzer are images of each other and corresponds to primitive characteristic polynomial then behaviors of faults masking remains identical. The simulation results of single stuck-at faults show how the use of such feedback connections in pseudo-random test-sequence generator and signature analyzer yields to mask the same faults.


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