A Novel Distributed Amplifier With High Gain, Low Noise, and High Output Power in ${\hbox{0.18-}} \mu{\hbox {m}}$ CMOS Technology

2013 ◽  
Vol 61 (4) ◽  
pp. 1533-1542 ◽  
Author(s):  
Jui-Chih Kao ◽  
Ping Chen ◽  
Pin-Cheng Huang ◽  
Huei Wang
2003 ◽  
Vol 82 (18) ◽  
pp. 3083-3085 ◽  
Author(s):  
Tommy W. Berg ◽  
Jesper Mørk

Power amplifiers are one of the most important functional blocks in the Radio Frequency (RF) frontend for reliable wireless communications. The power amplifiers amplify and boost the input signal to needed output power. The signal is amplified to create it sufficiently high for the transmitter to propagate the needed distance to the receiver. Such as power amplifiers are expected to need low-power communication while producing a relatively high output power with more efficiency. The trans-receiver has various blocks such as filters, Voltage Control Oscillator (VCO), Low Noise Amplifier (LNA) and power amplifier. Among these, the most power hungry device is a power amplifier. The efficiency of the power amplifier can be 100%, but practically it is just 55%. So, the scope of improvement in efficiency in a power amplifier will be an interesting and most challenging task. As well defined architecture, including linear functional block synthesis, which is complex in designing CMOS power amplifier for different applications. This article describes the different state-of-the-art design biasing class and advanced RF CMOS power amplifier for Industrial, Scientific, and Medical (ISM) band applications.


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