A 9-Bit 70-MS/s Two-Stage SAR ADC With Passive Residue Transfer

2020 ◽  
Vol 28 (5) ◽  
pp. 1185-1194
Author(s):  
Alireza Mosalmani ◽  
Mehdi Khoee ◽  
Omid Shoaei
Keyword(s):  
Sar Adc ◽  
Two Stage

A 12-bit 50MS/s zero-crossing-based two-stage pipelined SAR ADC in 0.18µm CMOS

2016 ◽  
Vol 57 ◽  
pp. 26-33 ◽  
Author(s):  
Yi Shen ◽  
Shubin Liu ◽  
Zhangming Zhu
Keyword(s):  
Sar Adc ◽  
Two Stage ◽  
Zero Crossing

A Configurable Noise-Shaping Band-Pass SAR ADC With Two-Stage Clock-Controlled Amplifier

2020 ◽  
Vol 67 (11) ◽  
pp. 3728-3739
Author(s):  
Zihao Jiao ◽  
Yang Chen ◽  
Xiaobo Su ◽  
Quan Sun ◽  
Xiaofei Wang ◽  
...  
Keyword(s):  
Sar Adc ◽  
Noise Shaping ◽  
Two Stage ◽  
Band Pass

A 348μW 68.8dB-SNDR 20MS/s Pipelined SAR ADC with a Closed-Loop Two-Stage Dynamic Amplifier

2021 ◽  
pp. 1-1
Author(s):  
Yigi Kwon ◽  
Taewoong Kim ◽  
Nan Sun ◽  
Youngcheol Chae
Keyword(s):  
Closed Loop ◽  
Sar Adc ◽  
Two Stage

A 99.8% Energy-Reduced Two-Stage Mixed Switching Scheme for SAR ADC Without Reset Energy

2019 ◽  
Vol 38 (12) ◽  
pp. 5426-5447 ◽  
Author(s):  
Yushi Chen ◽  
Yiqi Zhuang ◽  
Hualian Tang
Keyword(s):  
Sar Adc ◽  
Switching Scheme ◽  
Two Stage

scholarly journals A 10-bit 300 MS/s 5.8 mW SAR ADC With Two-Stage Interpolation for PET Imaging

2018 ◽  
Vol 18 (5) ◽  
pp. 2006-2014 ◽  
Author(s):  
Lei Qiu ◽  
Keping Wang ◽  
Kai Tang ◽  
Liter Siek ◽  
Yuanjin Zheng
Keyword(s):  
Pet Imaging ◽  
Sar Adc ◽  
Two Stage

A 10 b 50 MS/s two-stage pipelined SAR ADC in 180 nm CMOS

2016 ◽  
Vol 37 (6) ◽  
pp. 065001
Author(s):  
Shen Yi ◽  
Liu Shubin ◽  
Zhu Zhangming
Keyword(s):  
Sar Adc ◽  
Two Stage
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