Design of a 9-bit column-parallel ADC in the MAPS for real-time beam monitoring

This paper describes a 2 Msps 9-bit column-parallel ADC for monolithic active pixel sensor. It is designed in fully differential cyclic architecture and takes eight clock cycles to perform a 9-bit conversion. This ADC is fabricated in a 130 nm CMOS process. Each ADC covers a small area of 100 µm × 300 µm and consumes ∼5 mW. The measurement results show that this ADC has a signal-to-noise and distortion ratio (SNDR) of 46.8 dB. The DNL (Differential Nonlinearity) and (Integral Nonlinearity) INL are 0.168 LSB and 0.112 LSB, respectively. The effective number of bits (ENOB) is 7.48 bits.

A High-Speed Fully Differential Telescopic Op-Amp for Active Filter Designs in V2X Applications

In this paper, an ultra-wideband fully differential two-stage telescopic 65-nm CMOS op-amp is presented, which uses low-voltage design techniques such as level shifter circuits and low-voltage cascode current mirrors. The designed op-amp consists of two stages. While the telescopic first stage provides high speed and low swing, the second stage provides high gain and large swing. Common-mode feedback circuits (CMFB), which contain five transistors OTA and sensing resistors, are used to set the first-stage output to a known value. The designed two-stage telescopic operational amplifier has 41.04[Formula: see text]dB lower frequency gain, 1.81[Formula: see text]GHz gain-bandwidth product (GBW) and 51.9∘ phase margin under 5[Formula: see text]pF load capacitance. The design consumes a total current of 11.9[Formula: see text]mA from a 1.2-V supply voltage. Presented fully differential two-stage telescopic op-amp by using low-voltage design techniques is suitable for active filter in vehicle-to-everything (V2X) applications with 120[Formula: see text][Formula: see text]m[Formula: see text]m layout area.

A high-precision interface for tunneling magnetoresistance sensors with 0.15 nT/√Hz resolution

The tunneling magnetoresistance (TMR) with high-resolution digital output is widely used in military and civil fields. In this work we proposed a low-noise read-out circuit and a four-order fully differential sigma-delta modulator for TMR sensors. In the read-out circuit, we used symmetrical cascade for good matching. We used correlated double sampling (CDS) technique to improve the conversion accuracy of the modulator. In switched capacitor circuits we used time-division multiplexing to suppress charge injection and clock feedthrough. The high-precision application specific integrated circuit (ASIC) chip was fabricated by a 0.35 [Formula: see text]m CMOS process from Shanghai Huahong foundry. The TMR sensor was placed in an environment of three-layer magnetic shielding for test. The active area of the ASIC is only about [Formula: see text]. At a sampling frequency of 20 kHz, the TMR magnetometer consumes 77 mW from a single 5 V supply; the sigma-delta modulator for TMR can achieve an average noise floor of −141 dBV. The magnetometer works at a full scale (FS) of [Formula: see text], it can achieve a nonlinearity of 0.2% FS and a resolution of 0.15 nT/Hz[Formula: see text] over a signal bandwidth.

Polarized Z bosons from the decay of a Higgs boson produced in association with two jets at the LHC

Investigating the polarization of weak bosons provides an important probe of the scalar and gauge sector of the Standard Model. This can be done in the Higgs decay to four leptons, whose Standard-Model leading-order amplitude enables to generate polarized observables from unpolarized ones via a fully-differential reweighting method. We study the $$\text {Z} $$ Z -boson polarization from the decay of a Higgs boson produced in association with two jets, both in the gluon-fusion and in the vector-boson fusion channel. We also address the possibility of extending the results of this work to higher orders in perturbation theory.