Order is power: Selective Packet Interleaving for energy efficient Networks-on-Chip

2010 ◽  
Author(s):  
Amit Berman ◽  
Ran Ginosar ◽  
Idit Keidar
Keyword(s):  
Energy Efficient ◽  
Networks On Chip ◽  
On Chip

scholarly journals A Runtime Optimization Selection Framework to Realize Energy Efficient Networks-on-Chip

2016 ◽  
Vol E99.D (12) ◽  
pp. 2881-2890
Author(s):  
Yuan HE ◽  
Masaaki KONDO ◽  
Takashi NAKADA ◽  
Hiroshi SASAKI ◽  
Shinobu MIWA ◽  
...  
Keyword(s):  
Energy Efficient ◽  
Networks On Chip ◽  
Runtime Optimization ◽  
Selection Framework ◽  
On Chip

scholarly journals Energy Efficient Run-Time Incremental Mapping for 3-D Networks-on-Chip

2013 ◽  
Vol 28 (1) ◽  
pp. 54-71 ◽  
Author(s):  
Xiao-Hang Wang ◽  
Peng Liu ◽  
Mei Yang ◽  
Maurizio Palesi ◽  
Ying-Tao Jiang ◽  
...  
Keyword(s):  
Energy Efficient ◽  
Networks On Chip ◽  
Run Time ◽  
On Chip
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