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2022 ◽  
Vol 261 ◽  
pp. 107373
Author(s):  
Abdur Rahim Safi ◽  
Poolad Karimi ◽  
Marloes Mul ◽  
Abebe Chukalla ◽  
Charlotte de Fraiture

2022 ◽  
Vol 42 (2) ◽  
pp. 213-248
Author(s):  
Young-Gon Kim ◽  
Kiwook Jung ◽  
Seunghwan Kim ◽  
Man Jin Kim ◽  
Jee-Soo Lee ◽  
...  

2022 ◽  
Vol 169 ◽  
pp. 104604
Author(s):  
J.L. Torres-Moreno ◽  
N.C. Cruz ◽  
J.D. Álvarez ◽  
J.L. Redondo ◽  
A. Giménez-Fernandez

2022 ◽  
Vol 15 (3) ◽  
pp. 1-32
Author(s):  
Naif Tarafdar ◽  
Giuseppe Di Guglielmo ◽  
Philip C. Harris ◽  
Jeffrey D. Krupa ◽  
Vladimir Loncar ◽  
...  

  AIgean , pronounced like the sea, is an open framework to build and deploy machine learning (ML) algorithms on a heterogeneous cluster of devices (CPUs and FPGAs). We leverage two open source projects: Galapagos , for multi-FPGA deployment, and hls4ml , for generating ML kernels synthesizable using Vivado HLS. AIgean provides a full end-to-end multi-FPGA/CPU implementation of a neural network. The user supplies a high-level neural network description, and our tool flow is responsible for the synthesizing of the individual layers, partitioning layers across different nodes, as well as the bridging and routing required for these layers to communicate. If the user is an expert in a particular domain and would like to tinker with the implementation details of the neural network, we define a flexible implementation stack for ML that includes the layers of Algorithms, Cluster Deployment & Communication, and Hardware. This allows the user to modify specific layers of abstraction without having to worry about components outside of their area of expertise, highlighting the modularity of AIgean . We demonstrate the effectiveness of AIgean with two use cases: an autoencoder, and ResNet-50 running across 10 and 12 FPGAs. AIgean leverages the FPGA’s strength in low-latency computing, as our implementations target batch-1 implementations.


2022 ◽  
Vol 31 (2) ◽  
pp. 1-50
Author(s):  
Thomas Bock ◽  
Angelika Schmid ◽  
Sven Apel

Many open-source software projects depend on a few core developers, who take over both the bulk of coordination and programming tasks. They are supported by peripheral developers, who contribute either via discussions or programming tasks, often for a limited time. It is unclear what role these peripheral developers play in the programming and communication efforts, as well as the temporary task-related sub-groups in the projects. We mine code-repository data and mailing-list discussions to model the relationships and contributions of developers in a social network and devise a method to analyze the temporal collaboration structures in communication and programming, learning about the strength and stability of social sub-groups in open-source software projects. Our method uses multi-modal social networks on a series of time windows. Previous work has reduced the network structure representing developer collaboration to networks with only one type of interaction, which impedes the simultaneous analysis of more than one type of interaction. We use both communication and version-control data of open-source software projects and model different types of interaction over time. To demonstrate the practicability of our measurement and analysis method, we investigate 10 substantial and popular open-source software projects and show that, if sub-groups evolve, modeling these sub-groups helps predict the future evolution of interaction levels of programmers and groups of developers. Our method allows maintainers and other stakeholders of open-source software projects to assess instabilities and organizational changes in developer interaction and can be applied to different use cases in organizational analysis, such as understanding the dynamics of a specific incident or discussion.


2022 ◽  
Vol 15 (1) ◽  
pp. 1-27
Author(s):  
Yun Zhou ◽  
Pongstorn Maidee ◽  
Chris Lavin ◽  
Alireza Kaviani ◽  
Dirk Stroobandt

One of the key obstacles to pervasive deployment of FPGA accelerators in data centers is their cumbersome programming model. Open source tooling is suggested as a way to develop alternative EDA tools to remedy this issue. Open source FPGA CAD tools have traditionally targeted academic hypothetical architectures, making them impractical for commercial devices. Recently, there have been efforts to develop open source back-end tools targeting commercial devices. These tools claim to follow an alternate data-driven approach that allows them to be more adaptable to the domain requirements such as faster compile time. In this paper, we present RWRoute, the first open source timing-driven router for UltraScale+ devices. RWRoute is built on the RapidWright framework and includes the essential and pragmatic features found in commercial FPGA routers that are often missing from open source tools. Another valuable contribution of this work is an open-source lightweight timing model with high fidelity timing approximations. By leveraging a combination of architectural knowledge, repeating patterns, and extensive analysis of Vivado timing reports, we obtain a slightly pessimistic, lumped delay model within 2% average accuracy of Vivado for UltraScale+ devices. Compared to Vivado, RWRoute results in a 4.9× compile time improvement at the expense of 10% Quality of Results (QoR) loss for 665 synthetic and six real designs. A main benefit of our router is enabling fast partial routing at the back-end of a domain-specific flow. Our initial results indicate that more than 9× compile time improvement is achievable for partial routing. The results of this paper show how such a router can be beneficial for a low touch flow to reduce dependency on commercial tools.


Author(s):  
Nelson Baza-Solares ◽  
Ruben Velasquez-Martínez ◽  
Cristian Torres-Bohórquez ◽  
Yerly Martínez-Estupiñán ◽  
Cristian Poliziani

The analysis of traffic problems in large urban centers often requires the use of computational tools, which give the possibility to make a more detailed analysis of the issue, suggest solutions, predict behaviors and, above all, support efficient decision-making. Transport microsimulation software programs are a handy set of tools for this type of analysis. This research paper shows a case study where functions and limitations of Aimsun version 8.2.0, a commercial-like European software and Sumo version 1.3.1, a European open-source software, are presented. The input and output data are similar in both software and the interpretation of results is quite intuitive for both, as well. However, Aimsun's graphical interface interprets results more user-friendly, because Sumo is an open-access software presented as an effective alternative tool for transport modeling.


2022 ◽  
Vol 3 (1) ◽  
pp. 101077
Author(s):  
Corey Horien ◽  
Kangjoo Lee ◽  
Margaret L. Westwater ◽  
Stephanie Noble ◽  
Link Tejavibulya ◽  
...  
Keyword(s):  

2022 ◽  
Vol 31 (2) ◽  
pp. 1-23
Author(s):  
Jevgenija Pantiuchina ◽  
Bin Lin ◽  
Fiorella Zampetti ◽  
Massimiliano Di Penta ◽  
Michele Lanza ◽  
...  

Refactoring operations are behavior-preserving changes aimed at improving source code quality. While refactoring is largely considered a good practice, refactoring proposals in pull requests are often rejected after the code review. Understanding the reasons behind the rejection of refactoring contributions can shed light on how such contributions can be improved, essentially benefiting software quality. This article reports a study in which we manually coded rejection reasons inferred from 330 refactoring-related pull requests from 207 open-source Java projects. We surveyed 267 developers to assess their perceived prevalence of these identified rejection reasons, further complementing the reasons. Our study resulted in a comprehensive taxonomy consisting of 26 refactoring-related rejection reasons and 21 process-related rejection reasons. The taxonomy, accompanied with representative examples and highlighted implications, provides developers with valuable insights on how to ponder and polish their refactoring contributions, and indicates a number of directions researchers can pursue toward better refactoring recommenders.


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