Design and Virtex-7-Based Implementation of Video Chaotic Secure Communications
2020 ◽
Vol 30
(05)
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pp. 2050075
Keyword(s):
Ip Cores
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In this paper, a Virtex-7-based video chaotic secure communication scheme is investigated. First, the network sending and receiving controller Intellectual Property (IP) cores are designed. Next, the chaotic encryption and decryption IP cores are implemented using fixed-point algorithm, pipeline operation, and state machine control. Thus, video capturing, video displaying, network sending, network receiving, chaotic encrypting, and chaotic decrypting can be achieved via IP core integration design. An improved 7D chaotic stream cipher algorithm for resisting divide-and-conquer attack is then designed and realized on a Virtex-7 high-end FPGA platform. Hardware experimental results are also given to verify the feasibility of the scheme.
2011 ◽
Vol 28
(2)
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pp. 020505
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2005 ◽
Vol 342
(4)
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pp. 305-308
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2009 ◽
Vol 14
(4)
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pp. 1502-1508
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2019 ◽
Vol 2019
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pp. 1-16
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2009 ◽
Vol 14
(3)
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pp. 863-879
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Keyword(s):
2008 ◽
Vol 372
(33)
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pp. 5442-5447
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2014 ◽
Vol 543-547
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pp. 2535-2538
2008 ◽
Vol 18
(1)
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pp. 013121
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