scholarly journals Distilled Split Deep Neural Networks for Edge-Assisted Real-Time Systems

Author(s):  
Yoshitomo Matsubara ◽  
Sabur Baidya ◽  
Davide Callegaro ◽  
Marco Levorato ◽  
Sameer Singh
2020 ◽  
Vol 50 (9) ◽  
pp. 1760-1777 ◽  
Author(s):  
Daniel Casini ◽  
Alessandro Biondi ◽  
Giorgio Buttazzo

1994 ◽  
Author(s):  
Erwin L. Hunter ◽  
Abhijit S. Pandya ◽  
Neal Coulter

1990 ◽  
Vol 2 (1) ◽  
pp. 35-43 ◽  
Author(s):  
Arun Rao ◽  
Mark R. Walker ◽  
Lawrence T. Clark ◽  
L. A. Akers ◽  
R. O. Grondin

The embedding of neural networks in real-time systems performing classification and clustering tasks requires that models be implemented in hardware. A flexible, pipelined associative memory capable of operating in real-time is proposed as a hardware substrate for the emulation of neural fixed-radius clustering and binary classification schemes. This paper points out several important considerations in the development of hardware implementations. As a specific example, it is shown how the ART1 paradigm can be functionally emulated by the limited resolution pipelined architecture, in the absence of full parallelism.


2020 ◽  
pp. 1-1
Author(s):  
Hammond Pearce ◽  
Xin Yang ◽  
Partha S. Roop ◽  
Marc Katzef ◽  
Torur Biskopsto Strom

Author(s):  
Ahmed Ghazi Blaiech ◽  
Khaled Ben Khalifa ◽  
Mohamed Boubaker ◽  
Mohamed Akil ◽  
Mohamed Hedi Bedoui

The Multiple-Wordlength Operation Grouping (MWOG) is a recently used approach for an optimized implementation on a Field Programmable Gate Array (FPGA). By fixing the precision constraint, this approach allows minimizing the data wordlength. In this paper, the authors present the integration of the approach based on the MWOG in the Algorithm Architecture Adequation (AAA) methodology, designed to implement real-time applications onto reconfigurable circuits. This new AAA-MWOG methodology will improve the optimization phase of the AAA methodology by taking into account the data wordlength and creating approximative-wordlength operation groups, where the operations in the same group will be performed with the same operator. The AAA-MWOG methodology will allow a considerable gain of circuit resources. This contribution is demonstrated by implementing the Learning Vector Quantization (LVQ) neural-networks model on the FPGA. The LVQ optimization is used to quantify vigilance states starting from processing the electroencephalographic signal. The precision-gain relation has been studied and reported.


1995 ◽  
Vol 9 (3) ◽  
pp. 289-304 ◽  
Author(s):  
Ruck Thawonmas ◽  
Goutam Chakraborty ◽  
Norio Shiratori

IEE Review ◽  
1992 ◽  
Vol 38 (3) ◽  
pp. 112
Author(s):  
Stuart Bennett

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