Strongly bounded termination with applications to security and hardware synthesis

Proceedings of the 5th ACM SIGPLAN International Workshop on Type-Driven Development ◽

10.1145/3406089.3409029 ◽

2020 ◽

Author(s):

Thomas Reynolds ◽

William L. Harrison ◽

Rohit Chadha ◽

Gerard Allwein

Keyword(s):

Hardware Synthesis

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Hardware Synthesis of Explicit Model Predictive Controllers

IEEE Transactions on Control Systems Technology ◽

10.1109/tcst.2006.883206 ◽

2007 ◽

Vol 15 (1) ◽

pp. 191-197 ◽

Author(s):

Tor A. Johansen ◽

Warren Jackson ◽

Robert Schreiber ◽

Petter Tondel

Keyword(s):

Explicit Model ◽

Hardware Synthesis ◽

Model Predictive Controllers ◽

Predictive Controllers

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VeriGOOD-ML: An Open-Source Flow for Automated ML Hardware Synthesis

10.1109/iccad51958.2021.9643449 ◽

2021 ◽

Author(s):

Hadi Esmaeilzadeh ◽

Soroush Ghodrati ◽

Jie Gu ◽

Shiyu Guo ◽

Andrew B. Kahng ◽

...

Keyword(s):

Open Source ◽

Hardware Synthesis ◽

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Live demonstration: High level software and hardware synthesis of dataflow programs

2013 IEEE International Symposium on Circuits and Systems (ISCAS2013) ◽

10.1109/iscas.2013.6571930 ◽

2013 ◽

Author(s):

Endri Bezati ◽

Ghislain Roquier ◽

Marco Mattavelli

Keyword(s):

Hardware Synthesis ◽

Live Demonstration ◽

Software And Hardware ◽

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Hardware Synthesis from a Restricted Class of LOTOS Expressions

IFIP Advances in Information and Communication Technology - Protocol Specification, Testing and Verification XIV ◽

10.1007/978-0-387-34867-4_28 ◽

1995 ◽

pp. 379-386 ◽

Author(s):

Teruo Higashino ◽

Keiichi Yasumoto ◽

Junji Kitamichi ◽

Kenichi Taniguchi

Keyword(s):

Restricted Class ◽

Hardware Synthesis

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Hardware synthesis of artificial neural networks using field programmable gate arrays and fixed-point numbers

2006 IEEE Region 5 Conference ◽

10.1109/tpsd.2006.5507410 ◽

2006 ◽

Author(s):

Mychal Hoffman ◽

Paul Bauer ◽

Brian Hemrnelman ◽

Abul Hasan

Keyword(s):

Neural Networks ◽

Fixed Point ◽

Artificial Neural Networks ◽

Field Programmable Gate Arrays ◽

Hardware Synthesis ◽

Gate Arrays ◽

Field Programmable ◽

Programmable Gate Arrays ◽

Artificial Neural

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Global hardware synthesis from behavioral dataflow descriptions

27th ACM/IEEE Design Automation Conference ◽

10.1145/123186.123337 ◽

1990 ◽

Author(s):

Josef Scheichenzuber ◽

Werner Grass ◽

Ulrich Lauther ◽

Sabine März

Keyword(s):

Hardware Synthesis

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Hardware synthesis from requirement specifications

Proceedings EURO-DAC '96. European Design Automation Conference with EURO-VHDL '96 and Exhibition ◽

10.1109/eurdac.1996.558249 ◽

2002 ◽

Author(s):

K. Feyerabend ◽

R. Schlor

Keyword(s):

Hardware Synthesis ◽

Requirement Specifications

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A Review of Hardware Synthesis Techniques

Hardware/Software Co-Design ◽

10.1007/978-94-009-0187-2_15 ◽

1996 ◽

pp. 367-396 ◽

Author(s):

R. Camposano ◽

D. Knapp ◽

D. Macmillen

Keyword(s):

Hardware Synthesis ◽

Synthesis Techniques

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Hardware synthesis from C/C++

Proceedings of the conference on Design, automation and test in Europe - DATE '99 ◽

10.1145/307418.307529 ◽

1999 ◽

Author(s):

Abhijit Ghosh ◽

Joachim Kunkel ◽

Stan Liao

Keyword(s):

Hardware Synthesis

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Hardware synthesis with the Bach system

ISCAS'99. Proceedings of the 1999 IEEE International Symposium on Circuits and Systems VLSI (Cat. No.99CH36349) ◽

10.1109/iscas.1999.780171 ◽

2003 ◽

Author(s):

A. Yamada ◽

K. Nishida ◽

R. Sakurai ◽

A. Kay ◽

T. Nomura ◽

...

Keyword(s):

Hardware Synthesis

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