FPGA interconnect planning

Proceedings of the 2002 international workshop on System-level interconnect prediction - SLIP '02 ◽

10.1145/505348.505353 ◽

2002 ◽

Author(s):

Amit Singh ◽

Malgorzata Marek-Sadowska

Keyword(s):

Interconnect Planning

Download Full-text

Interconnect planning with local area constrained retiming [logic IC layout]

2003 Design, Automation and Test in Europe Conference and Exhibition ◽

10.1109/date.2003.1253649 ◽

2003 ◽

Author(s):

Ruibing Lu ◽

Cheng-Kok Koh

Keyword(s):

Interconnect Planning

Download Full-text

Global Interconnect Planning

Handbook of Algorithms for Physical Design Automation ◽

10.1201/9781420013481.ch33 ◽

2008 ◽

Author(s):

Cheng-Kok Koh ◽

Evangeline Young ◽

Yao-Wen Chang

Keyword(s):

Global Interconnect ◽

Interconnect Planning

Download Full-text

Global Interconnect Planning

Handbook of Algorithms for Physical Design Automation ◽

10.1201/9781420013481-33 ◽

2008 ◽

pp. 645-672

Author(s):

Cheng-Kok Koh ◽

Evangeline F.Y. Young ◽

Yao-Wen Chang

Keyword(s):

Global Interconnect ◽

Interconnect Planning

Download Full-text

Integrated floorplanning and interconnect planning

1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051) ◽

10.1109/iccad.1999.810674 ◽

2003 ◽

Author(s):

Hung-Ming Chen ◽

Hai Zhou ◽

F.Y. Young ◽

D.F. Wong ◽

H.H. Yang ◽

...

Keyword(s):

Interconnect Planning

Download Full-text

Flip-flop and repeater insertion for early interconnect planning

Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition ◽

10.1109/date.2002.998374 ◽

2003 ◽

Author(s):

Ruibing Lu ◽

Guoan Zhong ◽

Cheng-Kok Koh ◽

Kai-Yuan Chao

Keyword(s):

Flip Flop ◽

Interconnect Planning

Download Full-text

Interconnect Planning

Network Theory and Applications - Layout Optimization in VLSI Design ◽

10.1007/978-1-4757-3415-7_2 ◽

2001 ◽

pp. 19-44

Author(s):

Jason Cong

Keyword(s):

Interconnect Planning

Download Full-text

Integrated Floorplanning and Interconnect Planning

Network Theory and Applications - Layout Optimization in VLSI Design ◽

10.1007/978-1-4757-3415-7_1 ◽

2001 ◽

pp. 1-18 ◽

Author(s):

Hung-Ming Chen ◽

Martin D. F. Wong ◽

Hai Zhou ◽

Fung-Yu Young ◽

Hannah H. Yang ◽

...

Keyword(s):

Interconnect Planning

Download Full-text

Buffer block planning for interconnect planning and prediction

IEEE Transactions on Very Large Scale Integration (VLSI) Systems ◽

10.1109/92.974906 ◽

2001 ◽

Vol 9 (6) ◽

pp. 929-937 ◽

Author(s):

J. Cong ◽

Tianming Kong ◽

Z.D. Pan

Keyword(s):

Interconnect Planning ◽

Buffer Block ◽

Download Full-text