An improved protocol test generation procedure based on UIOS

ACM SIGCOMM Computer Communication Review ◽

10.1145/75247.75274 ◽

1989 ◽

Vol 19 (4) ◽

pp. 283-294 ◽

Author(s):

W. Y. L. Chan ◽

C. T. Vuong ◽

M. R. Otp

Keyword(s):

Test Generation ◽

Protocol Test ◽

Generation Procedure

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A protocol test generation procedure

Computer Networks and ISDN Systems ◽

10.1016/0169-7552(88)90064-5 ◽

1988 ◽

Vol 15 (4) ◽

pp. 285-297 ◽

Author(s):

Krishan Sabnani ◽

Anton Dahbura

Keyword(s):

Test Generation ◽

Protocol Test ◽

Generation Procedure

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An improved protocol test generation procedure based on UIOS

Symposium proceedings on Communications architectures & protocols - SIGCOMM '89 ◽

10.1145/75246.75274 ◽

1989 ◽

Author(s):

W. Y. L. Chan ◽

C. T. Vuong ◽

M. R. Otp

Keyword(s):

Test Generation ◽

Protocol Test ◽

Generation Procedure

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A diagnostic test generation procedure based on test elimination by vector omission for synchronous sequential circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.845083 ◽

2000 ◽

Vol 19 (5) ◽

pp. 589-600 ◽

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Diagnostic Test ◽

Test Generation ◽

Sequential Circuits ◽

Synchronous Sequential Circuits ◽

Generation Procedure

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Protocol test generation, trace analysis and verification techniques

[1988] Proceedings. Second Workshop on Software Testing, Verification, and Analysis ◽

10.1109/wst.1988.5364 ◽

2003 ◽

Author(s):

B. Sarikaya

Keyword(s):

Test Generation ◽

Trace Analysis ◽

Verification Techniques ◽

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An improved RCP-method for protocol test generation using backward UIO sequences

[Proceedings] 1991 Symposium on Applied Computing ◽

10.1109/soac.1991.143890 ◽

2002 ◽

Author(s):

Xiaojun Shen ◽

S. Scoggins ◽

A. Tang

Keyword(s):

Test Generation ◽

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TEMPLATES: a test generation procedure for synchronous sequential circuits

Proceedings Sixth Asian Test Symposium (ATS'97) ◽

10.1109/ats.1997.643923 ◽

2002 ◽

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Test Generation ◽

Sequential Circuits ◽

Synchronous Sequential Circuits ◽

Generation Procedure

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A diagnostic test generation procedure for synchronous sequential circuits based on test elimination

Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270) ◽

10.1109/test.1998.743306 ◽

2002 ◽

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Diagnostic Test ◽

Test Generation ◽

Sequential Circuits ◽

Synchronous Sequential Circuits ◽

Generation Procedure

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A diagnostic test generation procedure for combinational circuits based on test elimination

Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259) ◽

10.1109/ats.1998.741661 ◽

2002 ◽

Author(s):

I. Pomeranz ◽

W.K. Fuchs

Keyword(s):

Diagnostic Test ◽

Test Generation ◽

Combinational Circuits ◽

Generation Procedure

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ACTIV-LOCSTEP: a test generation procedure based on logic simulation and fault activation

Proceedings of IEEE 27th International Symposium on Fault Tolerant Computing ◽

10.1109/ftcs.1997.614087 ◽

2002 ◽

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Test Generation ◽

Logic Simulation ◽

Fault Activation ◽

Generation Procedure

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LOCSTEP: a logic-simulation-based test generation procedure

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/43.631218 ◽

1997 ◽

Vol 16 (5) ◽

pp. 544-554 ◽

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Test Generation ◽

Logic Simulation ◽

Simulation Based ◽

Generation Procedure

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