Exercise Fat Oxidation Is Positively Associated with Body Fatness in Men with Obesity: Defying the Metabolic Flexibility Paradigm

Obesity is thought to be associated with a reduced capacity to increase fat oxidation in response to physical exercise; however, scientific evidence supporting this paradigm remains scarce. This study aimed to determine the interrelationship of different submaximal exercise metabolic flexibility (Metflex) markers and define its association with body fatness on subjects with obesity. Twenty-one male subjects with obesity performed a graded-intensity exercise protocol (Test 1) during which cardiorespiratory fitness (CRF), maximal fat oxidation (MFO) and its corresponding exercise intensity (FATmax) were recorded. A week afterward, each subject performed a 60-min walk (treadmill) at FATmax (Test 2), and the resulting fat oxidation area under the curve (TFO) and maximum respiratory exchange ratio (RERpeak) were recorded. Blood lactate (LAb) levels was measured during both exercise protocols. Linear regression analysis was used to study the interrelationship of exercise Metflex markers. Pearson’s correlation was used to evaluate all possible linear relationships between Metflex and anthropometric measurement, controlling for CRF). The MFO explained 38% and 46% of RERpeak and TFO’s associated variance (p < 0.01) while TFO and RERpeak were inversely related (R2 = 0.54, p < 0.01). Body fatness positively correlated with MFO (r = 0.64, p < 0.01) and TFO (r = 0.63, p < 0.01) but inversely related with RERpeak (r = −0.67, p < 0.01). This study shows that MFO and RERpeak are valid indicators of TFO during steady-state exercise at FATmax. The fat oxidation capacity is directly associated with body fatness in males with obesity.

Cache coherency controller for MESI protocol based on FPGA

In modern techniques of building processors, manufactures using more than one processor in the integrated circuit (chip) and each processor called a core. The new chips of processors called a multi-core processor. This new design makes the processors to work simultanously for more than one job or all the cores working in parallel for the same job. All cores are similar in their design, and each core has its own cache memory, while all cores shares the same main memory. So if one core requestes a block of data from main memory to its cache, there should be a protocol to declare the situation of this block in the main memory and other cores.This is called the cache coherency or cache consistency of multi-core. In this paper a special circuit is designed using very high speed integrated circuit hardware description language (VHDL) coding and implemented using ISE Xilinx software. The protocol used in this design is the modified, exclusive, shared and invalid (MESI) protocol. Test results were taken by using test bench, and showed all the states of the protocol are working correctly.

QUIC transmission protocol: Test-bed design, implementation and experimental evaluation

With the ever increasing demand for higher speed internet connectivity that can fulfil the application continuous need for higher bandwidth Google being the pioneer in many web-based services has launched a new UDP-based protocol named quick UDP internet connections (QUIC), which aims at providing faster data delivery without requiring upgrades or modifications to the network infrastructure. The goal of this paper is to provide an overview about QUIC protocol, propose the design and implementation of a test-bed, that is used experimentally to evaluate QUIC protocol under different network conditions and scenarios. In particular, the performance advantage of QUIC in terms of delay and throughput are examined taking into account different network conditions that resemble the real internet environment. Two scenarios are proposed, the first one investigates the protocol performance under a controlled network environment, while the second one tests the protocol in a real uncontrolled network. To achieve that, a test-bed is proposed and implemented that emulates the network impairments encountered in real-network such as packet loss, bit errors, and bandwidth limitation in a controlled manner. After that, QUIC is tested in real operational wired and wireless networks. In both scenarios, QUIC outperforms TCP in terms of delay, which strengthens QUIC position for being a potential alternative to TCP.