Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259)
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Published By IEEE Comput. Soc

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Testing Embedded Memories: Is Bist The Ultimate Solution? Testing Of Embedded Memories-the Aggregate

Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259) ◽

10.1109/ats.1998.741670 ◽

2005 ◽

Cited By ~ 1

Author(s):

R.Z. Makki

Keyword(s):

Embedded Memories

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Microsystems Testing: A Challenge

Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259) ◽

10.1109/ats.1998.741666 ◽

2005 ◽

Author(s):

M. Renovell

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A DFT methodology for high-speed MCM based on boundary scan techniques

Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259) ◽

10.1109/ats.1998.1191704 ◽

2005 ◽

Author(s):

Y. Sameshima ◽

T. Fukazawa

Keyword(s):

High Speed ◽

Boundary Scan

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Microsystem Testing: Challenge Or Common Knowledge

Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259) ◽

10.1109/ats.1998.741665 ◽

2005 ◽

Author(s):

H.G. Kerkhoff

Keyword(s):

Common Knowledge

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Bridging A Gap Between Microelectronics And Micromechanics Testing

Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259) ◽

10.1109/ats.1998.741667 ◽

2005 ◽

Author(s):

M. Lubaszewski

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Testing Embedded Memories: Is BIST The Ultimate Solution? Answers to the Key Issues

Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259) ◽

10.1109/ats.1998.741671 ◽

2005 ◽

Author(s):

A.J. van de Goor

Keyword(s):

Key Issues ◽

Embedded Memories

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Testing Embedded Memories: Is Bist The Ultimate Solution? An Asic Designer's Point Of View

Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259) ◽

10.1109/ats.1998.741669 ◽

2005 ◽

Author(s):

M. Jacomet

Keyword(s):

Point Of View ◽

Embedded Memories

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Testing Embedded Memories: Is BIST The Ultimate Solution?

Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259) ◽

10.1109/ats.1998.741668 ◽

2005 ◽

Cited By ~ 6

Author(s):

Cheng-Wen Wu

Keyword(s):

Embedded Memories

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Exploiting BIST approach for two-pattern testing

Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259) ◽

10.1109/ats.1998.741651 ◽

2002 ◽

Author(s):

Xiaowei Li ◽

P.Y.S. Cheung

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Test generation for synchronous sequential circuits to reduce storage requirements

Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259) ◽

10.1109/ats.1998.741655 ◽

2002 ◽

Cited By ~ 1

Author(s):

I. Pomeranz ◽

S.M. Reddy

Keyword(s):

Test Generation ◽

Sequential Circuits ◽

Synchronous Sequential Circuits

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Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc

Testing Embedded Memories: Is Bist The Ultimate Solution? Testing Of Embedded Memories-the Aggregate

Microsystems Testing: A Challenge

A DFT methodology for high-speed MCM based on boundary scan techniques

Microsystem Testing: Challenge Or Common Knowledge

Bridging A Gap Between Microelectronics And Micromechanics Testing

Testing Embedded Memories: Is BIST The Ultimate Solution? Answers to the Key Issues

Testing Embedded Memories: Is Bist The Ultimate Solution? An Asic Designer's Point Of View

Testing Embedded Memories: Is BIST The Ultimate Solution?

Exploiting BIST approach for two-pattern testing

Test generation for synchronous sequential circuits to reduce storage requirements

Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259)
Latest Publications