CMOS without Doping on SOI: Multi-Gate Si-Nanowire Transistors for Logic and Memory Applications

2013 ◽  
Vol 2 (6) ◽  
pp. Q88-Q93 ◽  
Author(s):  
U. Schwalke ◽  
T. Krauss ◽  
F. Wessely
Keyword(s):  
Si Nanowire ◽  
Nanowire Transistors ◽  
Memory Applications

Dopant-Free CMOS on SOI: Multi-Gate Si-Nanowire Transistors for Logic and Memory Applications

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Vol 53 (5) ◽  
pp. 105-114 ◽  
Author(s):  
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T. Krauss ◽  
F. Wessely
Keyword(s):  
Si Nanowire ◽  
Nanowire Transistors ◽  
Memory Applications

Quantum Confinement Induced Performance Enhancement in Sub-5-nm Lithographic Si Nanowire Transistors

Nano Letters ◽  
2011 ◽  
Vol 11 (4) ◽  
pp. 1412-1417 ◽  
Author(s):  
Krutarth Trivedi ◽  
Hyungsang Yuk ◽  
Herman Carlo Floresca ◽  
Moon J. Kim ◽  
Walter Hu
Keyword(s):  
Quantum Confinement ◽  
Performance Enhancement ◽  
Si Nanowire ◽  
Nanowire Transistors

Gate-All-Around Si-Nanowire Transistors: Simulation at Nanoscale

2018 ◽  
Author(s):  
S. Dey ◽  
T. P. Dash ◽  
S. Das ◽  
E. Mohapatra ◽  
J. Jena ◽  
...  
Keyword(s):  
Si Nanowire ◽  
Nanowire Transistors

Towards structured ASICs using polarity-tunable Si nanowire transistors

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Author(s):  
Pierre-Emmanuel Gaillardon ◽  
Michele De Marchi ◽  
Luca Amarù ◽  
Shashikanth Bobba ◽  
Davide Sacchetto ◽  
...  
Keyword(s):  
Si Nanowire ◽  
Nanowire Transistors
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