VLSI Architectures of Booth Multiplication Algorithms – A Review

Hareesh B; John Moses C; MVV Prasad Kantipudi

doi:10.12785/ijcds/110122

VLSI Architectures of Booth Multiplication Algorithms – A Review

International Journal of Computing and Digital Systems ◽

10.12785/ijcds/110122 ◽

2022 ◽

Vol 11 (1) ◽

pp. 265-275

Author(s):

Hareesh B ◽

John Moses C ◽

MVV Prasad Kantipudi

Keyword(s):

Vlsi Architectures

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The systematic design of area efficient VLSI architectures for the discrete Fourier transform

[1991] Conference Record of the Twenty-Fifth Asilomar Conference on Signals, Systems & Computers ◽

10.1109/acssc.1991.186426 ◽

2002 ◽

Author(s):

A.W. Julien ◽

W.G. Bliss

Keyword(s):

Fourier Transform ◽

Discrete Fourier Transform ◽

Systematic Design ◽

Vlsi Architectures ◽

Area Efficient

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Efficient technique for partitioning and programming linear algebra algorithms on concurrent VLSI architectures

IEE Proceedings - Circuits Devices and Systems ◽

10.1049/ip-cds:19951795 ◽

1995 ◽

Vol 142 (2) ◽

pp. 97

Author(s):

E. Di Zitti ◽

M. Chirico ◽

F. Curatelli ◽

G.M. Bisio

Keyword(s):

Linear Algebra ◽

Efficient Technique ◽

Vlsi Architectures

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Fixed-Point NLMS and IPNLMS VLSI Architectures for Accurate FECG and FHR Processing

IEEE Transactions on Biomedical Circuits and Systems ◽

10.1109/tbcas.2021.3120237 ◽

2021 ◽

Vol 15 (5) ◽

pp. 898-911

Author(s):

Patricia Ucker da Costa ◽

Guilherme Paim ◽

Leandro Mateus Giacomini Rocha ◽

Eduardo Antonio Cesar da Costa ◽

Sergio Jose Melo de Almeida ◽

...

Keyword(s):

Fixed Point ◽

Vlsi Architectures

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Algorithms and vlsi architectures for low-density parity-check codes: part 2 - efficient coding architectures

IEEE Solid-State Circuits Magazine ◽

10.1109/mssc.2016.2622998 ◽

2017 ◽

Vol 9 (1) ◽

pp. 23-28

Author(s):

Kiran Gunnam ◽

Joan Marc Catala Perez ◽

Francisco Garcia-Herrero

Keyword(s):

Low Density ◽

Parity Check ◽

Vlsi Architectures ◽

Efficient Coding ◽

Low Density Parity Check ◽

Parity Check Codes

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Area efficient VLSI architectures for Huffman coding

IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing ◽

10.1109/82.257334 ◽

1993 ◽

Vol 40 (9) ◽

pp. 568-575 ◽

Cited By ~ 33

Author(s):

H. Park ◽

V.K. Prasanna

Keyword(s):

Huffman Coding ◽

Vlsi Architectures ◽

Area Efficient

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Efficient VLSI Architectures for the Advanced Encryption Standard Algorithm

Wireless Security and Cryptography ◽

10.1201/9780849387692.ch3 ◽

2007 ◽

Author(s):

Xinmiao Zhang

Keyword(s):

Advanced Encryption Standard ◽

Vlsi Architectures ◽

Standard Algorithm

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VLSI Architectures for JPEG 2000 EBCOT

The VLSI Handbook, Second Edition - Electrical Engineering Handbook ◽

10.1201/9781420005967.ch81 ◽

2006 ◽

pp. 81-1-81-25

Author(s):

Yijun Li ◽

Magdy Bayoumi

Keyword(s):

Jpeg 2000 ◽

Vlsi Architectures

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VLSI Architectures for Image Communications

Video, Speech, and Audio Signal Processing and Associated Standards - Electrical Engineering Handbook ◽

10.1201/9781420046090-c24 ◽

2009 ◽

pp. 1-22

Author(s):

P Pirsch ◽

W Gehrke

Keyword(s):

Vlsi Architectures

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An Efficient VLSI Architectures for FIR Filter in Fixed and Reconfigurable Applications

IOSR Journal of VLSI and Signal processing ◽

10.9790/4200-0704016372 ◽

2017 ◽

Vol 07 (04) ◽

pp. 63-72

Author(s):

D. Bhavani ◽

K. Padma Vasavi

Keyword(s):

Fir Filter ◽

Vlsi Architectures

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VLSI architectures for MPEG

2003 International Symposium on VLSI Technology, Systems and Applications. Proceedings of Technical Papers. (IEEE Cat. No.03TH8672) ◽

10.1109/vtsa.2003.1252589 ◽

2004 ◽

Cited By ~ 6

Author(s):

P. Pirsch ◽

M. Berekovic ◽

H.-J. Stolberg ◽

J. Jachalsky

Keyword(s):

Vlsi Architectures

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