Compiler Assisted Recovery For Fault-Tolerant Highly Parallel Multiprocessor Architectures

Interconnection networks of various topologies have been widely used in designing multiprocessor architectures. Study of graph theoretical or combinatorial properties of such networks help us better understand them, as well as develop on these architectures more efficient parallel algorithms including fault-tolerant communication/routing algorithms. In this paper, we analyze a broad class of interconnection networks from a new angle by looking into the corresponding graph spectra (i.e., eigenvalues and their multiplicities). Since eigenvalues of the edjacency matrix of a graph can reveal many important properties of the graph that are closely related to its combinatorial invariants, we believe that the study of spectra of interconnection networks can be a more unified approach to studying their topological properties. As a first step) in this direction, here we mainly concentrate on finding out the spectra of some of the most studied interconnection networks. Specifically, after a brief survey of results that relate spectra of graphs to their structural properties, we summarize the existing results for eigenvalues and multiplicities of several popular interconnection networks such as the hypercube and mesh. We also derive some of these results in a more straightforward way. Then we present new results on spectra for some other known networks such as the line graph of the hypercube, followed by experimental results on a few others including the star and pancake networks.

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A Survey of Multistage Interconnection Networks

Recent Advances in Electrical & Electronic Engineering (Formerly Recent Patents on Electrical & Electronic Engineering) ◽

10.2174/1872212113666190215145815 ◽

2020 ◽

Vol 13 (2) ◽

pp. 165-183

Author(s):

Amit Prakash ◽

Dilip K. Yadav ◽

Arvind Choubey

Keyword(s):

Fault Tolerance ◽

Interconnection Networks ◽

High Performance ◽

Fault Tolerant ◽

Network Architectures ◽

Multistage Interconnection Networks ◽

Processing Elements ◽

Multiprocessor Architectures ◽

Network Functionality

Background: Multistage interconnection networks are being used in computer and communications. Multiprocessor architectures for parallel computing exercise these interconnection networks for connecting various processing elements and transfer data between sub-systems of a digital system. The vast diversity of the field poses an obstacle to realize different kinds of interconnection networks and their relationship. Methods: This paper consists of an extensive survey of multistage interconnection networks. Results: A broad classification of multistage interconnection networks based on network functionality, reliability and fault tolerance is presented in order to emphasize the important principles which differentiate the network architectures. For each class of network, significant results are given and the basic design principles are explained. Conclusion: The various multistage interconnection networks design provide high performance, availability, throughput, lower latency, less power consumption along with improved fault-tolerance and reliability. However, there is a rising demand for new fault-tolerant and reliable multistage interconnection networks.

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