High level synthesis design flow for multi parametric optimization with hybrid hierarchical design space exploration

Design Space ◽

Space Exploration ◽

Design Flow ◽

System Level ◽

High Level Synthesis ◽

Efficient Design ◽

Optimum Result ◽

Fuzzy Search ◽

High Level Synthesis (HLS) has definitely bridged the pathway between the Electronic System Level (ESL) and its respective structural block at the Register Transfer Level (RTL). However, the most critical task during HLS is to assess and find a superior architecture from the design space that meets the design objectives. This thesis introduces a novel mechanism for efficient Design Space Exploration (DSE) based on Priority Facgtor using the Fuzzy search technique to achieve the optimum result. This novel approach is more efficient than traditional DSE approaches and is capable of drastically reducing the number of architectural variants to be assessed for architecture selection. The proposed method, when applied to a number of benchmarks, yielded improved results with remarkable speedup compared to the existing approach. The HLS design flow shown in this thesis uses the proposed approach for DSE with optimization of three parameters, hardware area, execution time and power consumption.

A high level synthesis design flow with a novel approach for efficient design space exploration in case of multi-parametric optimization objective

Microelectronics Reliability ◽

10.1016/j.microrel.2009.11.015 ◽

2010 ◽

Vol 50 (3) ◽

pp. 424-437 ◽

Cited By ~ 17

Author(s):

Anirban Sengupta ◽

Reza Sedaghat ◽

Zhipeng Zeng

Keyword(s):

Parametric Optimization ◽

Design Space ◽

Space Exploration ◽

Design Flow ◽

High Level Synthesis ◽

Efficient Design ◽

Synthesis Design ◽

Novel Approach ◽

A fast Design Space Exploration Based On Priority Factor For A Multi Parametric Optimized High Level Synthesis Design Flow

10.32920/ryerson.14663988.v1 ◽

2021 ◽

Author(s):

Anirban Sengupta

Keyword(s):

Design Space ◽

Space Exploration ◽

Design Flow ◽

High Level Synthesis ◽

Exploration Process ◽

Novel Approach ◽

Architecture Evaluation ◽

The Hierarchical Structure ◽

This thesis introduces a novel approach to rapid Design Space Exploration (DSE) and presents a formalized High Level Synthesis (HLS) design flow with multi parametric optimization issues related to DSE such as the precision of evaluation, time exhausted during evaluation and also automation of the exploration process. During DSE a conflicting situation always exists for the designer to concurrently maximize the accuracy of the exploration process and minimize the time spent during DSE analysis. This technique is capable of drastically reducing the number of architectural variants to be analyzed for accurate selection of the optimal design point in a short time. The DSE results for many benchmarks are presented along with a comparison to an existing DSE approach that uses the hierarchical structure method for architecture evaluation. Results indicated significant improvement in speedup compared to the current existing approach.

A fast Design Space Exploration Based On Priority Factor For A Multi Parametric Optimized High Level Synthesis Design Flow

10.32920/ryerson.14663988 ◽

2021 ◽

Author(s):

Anirban Sengupta

Keyword(s):

Design Space ◽

Space Exploration ◽

Design Flow ◽

High Level Synthesis ◽

Exploration Process ◽

Novel Approach ◽

Architecture Evaluation ◽

The Hierarchical Structure ◽

This thesis introduces a novel approach to rapid Design Space Exploration (DSE) and presents a formalized High Level Synthesis (HLS) design flow with multi parametric optimization issues related to DSE such as the precision of evaluation, time exhausted during evaluation and also automation of the exploration process. During DSE a conflicting situation always exists for the designer to concurrently maximize the accuracy of the exploration process and minimize the time spent during DSE analysis. This technique is capable of drastically reducing the number of architectural variants to be analyzed for accurate selection of the optimal design point in a short time. The DSE results for many benchmarks are presented along with a comparison to an existing DSE approach that uses the hierarchical structure method for architecture evaluation. Results indicated significant improvement in speedup compared to the current existing approach.