Adopting the moduli set [Formula: see text] for different DSP applications instead of the traditional moduli set [Formula: see text] has the advantage of excluding modulus [Formula: see text]. A multiply-and-accumulate modulo [Formula: see text] unit is more demanding than a modulo [Formula: see text] unit, which signifies the importance of this adoption. This paper introduces a new design for a scaling unit “Scaler”, that deals with the arithmetic-friendly residue number system (RNS) moduli set [Formula: see text]. The scaling factor is the power-of-two moduli [Formula: see text]. The scaling algorithm is based on the mixed-radix conversion (MRC) technique, which converts RNS-based representation into a weighted representation. The proposed approach is compared with other functionally-identical or functionally-similar scalers that perform scaling for the same moduli set under consideration or for the moduli set [Formula: see text]. The comparison is carried using theoretical unit-gate approach and experimental VLSI layout approach. The proposed scaler is shown to be more area and power-efficient than recently published competitive works.
