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2017 ◽  
Vol 29 (4) ◽  
pp. 257-268
Author(s):  
M.V. Petrochenkov ◽  
R.E. Mushtakov ◽  
I.A. Stotland

2016 ◽  
Vol 05 (04) ◽  
pp. 1641006 ◽  
Author(s):  
Rurik A. Primiani ◽  
Kenneth H. Young ◽  
André Young ◽  
Nimesh Patel ◽  
Robert W. Wilson ◽  
...  

A 32[Formula: see text]GHz bandwidth VLBI capable correlator and phased array has been designed and deployed a at the Smithsonian Astrophysical Observatory’s Submillimeter Array (SMA). The SMA Wideband Astronomical ROACH2 Machine (SWARM) integrates two instruments: a correlator with 140[Formula: see text]kHz spectral resolution across its full 32[Formula: see text]GHz band, used for connected interferometric observations, and a phased array summer used when the SMA participates as a station in the Event Horizon Telescope (EHT) very long baseline interferometry (VLBI) array. For each SWARM quadrant, Reconfigurable Open Architecture Computing Hardware (ROACH2) units shared under open-source from the Collaboration for Astronomy Signal Processing and Electronics Research (CASPER) are equipped with a pair of ultra-fast analog-to-digital converters (ADCs), a field programmable gate array (FPGA) processor, and eight 10 Gigabit Ethernet (GbE) ports. A VLBI data recorder interface designated the SWARM digital back end, or SDBE, is implemented with a ninth ROACH2 per quadrant, feeding four Mark6 VLBI recorders with an aggregate recording rate of 64 Gbps. This paper describes the design and implementation of SWARM, as well as its deployment at SMA with reference to verification and science data.


2014 ◽  
Vol 599-601 ◽  
pp. 1548-1552
Author(s):  
Bin Li ◽  
Zhi Ping Huang ◽  
Shao Jing Su ◽  
Jun Peng Hu

This paper describes the algorithm principle of CRC-32 codes, and then proposes multiple bits parallel input to achieve CRC-32 checksum on the basis of the principle. To design modules using VHDL language in Quartus II environment based on Altera’s EP4SGX230KF40C2 chip. Compared to traditional method of serial and 8 bits parallel data input, implementation of the program integrates 16, 32 and 64 bits parallel data input modes, the user can select the appropriate modules according to their needs and environmental constraints, which will greatly enhance the ability to adapt to the system and meet the needs of a variety of environments.


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